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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-08-05 11:14:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-08-07 04:55:48 -0400
commita09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch)
tree69689f467179891b498bd7423fcf61925173db31 /arch/arm/mach-clps7500
parenta1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff)
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-clps7500')
-rw-r--r--arch/arm/mach-clps7500/core.c2
-rw-r--r--arch/arm/mach-clps7500/include/mach/acornfb.h33
-rw-r--r--arch/arm/mach-clps7500/include/mach/debug-macro.S21
-rw-r--r--arch/arm/mach-clps7500/include/mach/dma.h21
-rw-r--r--arch/arm/mach-clps7500/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-clps7500/include/mach/hardware.h67
-rw-r--r--arch/arm/mach-clps7500/include/mach/io.h255
-rw-r--r--arch/arm/mach-clps7500/include/mach/irq.h32
-rw-r--r--arch/arm/mach-clps7500/include/mach/irqs.h66
-rw-r--r--arch/arm/mach-clps7500/include/mach/memory.h35
-rw-r--r--arch/arm/mach-clps7500/include/mach/system.h23
-rw-r--r--arch/arm/mach-clps7500/include/mach/timex.h13
-rw-r--r--arch/arm/mach-clps7500/include/mach/uncompress.h35
-rw-r--r--arch/arm/mach-clps7500/include/mach/vmalloc.h4
14 files changed, 622 insertions, 1 deletions
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index cfd8aca9f7da..cc1b82179e83 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -21,7 +21,7 @@
21#include <asm/mach/irq.h> 21#include <asm/mach/irq.h>
22#include <asm/mach/time.h> 22#include <asm/mach/time.h>
23 23
24#include <asm/arch/hardware.h> 24#include <mach/hardware.h>
25#include <asm/hardware/iomd.h> 25#include <asm/hardware/iomd.h>
26#include <asm/io.h> 26#include <asm/io.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
diff --git a/arch/arm/mach-clps7500/include/mach/acornfb.h b/arch/arm/mach-clps7500/include/mach/acornfb.h
new file mode 100644
index 000000000000..aea6330c9745
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/acornfb.h
@@ -0,0 +1,33 @@
1#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119)
2
3static inline void
4acornfb_vidc20_find_rates(struct vidc_timing *vidc,
5 struct fb_var_screeninfo *var)
6{
7 u_int bandwidth;
8
9 vidc->control |= VIDC20_CTRL_PIX_CK;
10
11 /* Calculate bandwidth */
12 bandwidth = var->pixclock * 8 / var->bits_per_pixel;
13
14 /* Encode bandwidth as VIDC20 setting */
15 if (bandwidth > 16667*2)
16 vidc->control |= VIDC20_CTRL_FIFO_16;
17 else if (bandwidth > 13333*2)
18 vidc->control |= VIDC20_CTRL_FIFO_20;
19 else if (bandwidth > 11111*2)
20 vidc->control |= VIDC20_CTRL_FIFO_24;
21 else
22 vidc->control |= VIDC20_CTRL_FIFO_28;
23
24 vidc->pll_ctl = 0x2020;
25}
26
27#ifdef CONFIG_CHRONTEL_7003
28#define acornfb_default_control() VIDC20_CTRL_PIX_HCLK
29#else
30#define acornfb_default_control() VIDC20_CTRL_PIX_VCLK
31#endif
32
33#define acornfb_default_econtrol() VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK
diff --git a/arch/arm/mach-clps7500/include/mach/debug-macro.S b/arch/arm/mach-clps7500/include/mach/debug-macro.S
new file mode 100644
index 000000000000..af4104e7e84a
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/debug-macro.S
@@ -0,0 +1,21 @@
1/* arch/arm/mach-clps7500/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14 .macro addruart,rx
15 mov \rx, #0xe0000000
16 orr \rx, \rx, #0x00010000
17 orr \rx, \rx, #0x00000be0
18 .endm
19
20#define UART_SHIFT 2
21#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-clps7500/include/mach/dma.h b/arch/arm/mach-clps7500/include/mach/dma.h
new file mode 100644
index 000000000000..63fcde505498
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/dma.h
@@ -0,0 +1,21 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/dma.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd.
5 */
6
7#ifndef __ASM_ARCH_DMA_H
8#define __ASM_ARCH_DMA_H
9
10/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
11
12/*
13 * This is the maximum DMA address that can be DMAd to.
14 * There should not be more than (0xd0000000 - 0xc0000000)
15 * bytes of RAM.
16 */
17#define MAX_DMA_ADDRESS 0xd0000000
18
19#define DMA_S0 0
20
21#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-clps7500/include/mach/entry-macro.S b/arch/arm/mach-clps7500/include/mach/entry-macro.S
new file mode 100644
index 000000000000..4e7e54144093
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/entry-macro.S
@@ -0,0 +1,16 @@
1#include <mach/hardware.h>
2#include <asm/hardware/entry-macro-iomd.S>
3
4 .equ ioc_base_high, IOC_BASE & 0xff000000
5 .equ ioc_base_low, IOC_BASE & 0x00ff0000
6
7 .macro get_irqnr_preamble, base, tmp
8 mov \base, #ioc_base_high @ point at IOC
9 .if ioc_base_low
10 orr \base, \base, #ioc_base_low
11 .endif
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h
new file mode 100644
index 000000000000..d66578a3371c
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/hardware.h
@@ -0,0 +1,67 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/hardware.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 * Copyright (C) 1999 Nexus Electronics Ltd.
6 *
7 * This file contains the hardware definitions of the
8 * CL7500 evaluation board.
9 */
10#ifndef __ASM_ARCH_HARDWARE_H
11#define __ASM_ARCH_HARDWARE_H
12
13#include <mach/memory.h>
14#include <asm/hardware/iomd.h>
15
16#ifdef __ASSEMBLY__
17#define IOMEM(x) x
18#else
19#define IOMEM(x) ((void __iomem *)(x))
20#endif
21
22/*
23 * What hardware must be present
24 */
25#define HAS_IOMD
26#define HAS_VIDC20
27
28/* Hardware addresses of major areas.
29 * *_START is the physical address
30 * *_SIZE is the size of the region
31 * *_BASE is the virtual address
32 */
33
34#define IO_START 0x03000000 /* I/O */
35#define IO_SIZE 0x01000000
36#define IO_BASE IOMEM(0xe0000000)
37
38#define ISA_START 0x0c000000 /* ISA */
39#define ISA_SIZE 0x00010000
40#define ISA_BASE 0xe1000000
41
42#define FLASH_START 0x01000000 /* XXX */
43#define FLASH_SIZE 0x01000000
44#define FLASH_BASE 0xe2000000
45
46#define LED_START 0x0302B000
47#define LED_SIZE 0x00001000
48#define LED_BASE 0xe3000000
49#define LED_ADDRESS (LED_BASE + 0xa00)
50
51/* Let's define SCREEN_START for CL7500, even though it's a lie. */
52#define SCREEN_START 0x02000000 /* VRAM */
53#define SCREEN_END 0xdfc00000
54#define SCREEN_BASE 0xdf800000
55
56#define VIDC_BASE (void __iomem *)0xe0400000
57#define IOMD_BASE IOMEM(0xe0200000)
58#define IOC_BASE IOMEM(0xe0200000)
59#define FLOPPYDMA_BASE IOMEM(0xe002a000)
60#define PCIO_BASE IOMEM(0xe0010000)
61
62#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
63
64/* in/out bias for the ISA slot region */
65#define ISASLOT_IO 0x80400000
66
67#endif
diff --git a/arch/arm/mach-clps7500/include/mach/io.h b/arch/arm/mach-clps7500/include/mach/io.h
new file mode 100644
index 000000000000..2ff2860889ed
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/io.h
@@ -0,0 +1,255 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/io.h
3 * from arch/arm/mach-rpc/include/mach/io.h
4 *
5 * Copyright (C) 1997 Russell King
6 *
7 * Modifications:
8 * 06-Dec-1997 RMK Created.
9 */
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13#include <mach/hardware.h>
14
15#define IO_SPACE_LIMIT 0xffffffff
16
17/*
18 * GCC is totally crap at loading/storing data. We try to persuade it
19 * to do the right thing by using these whereever possible instead of
20 * the above.
21 */
22#define __arch_base_getb(b,o) \
23 ({ \
24 unsigned int v, r = (b); \
25 __asm__ __volatile__( \
26 "ldrb %0, [%1, %2]" \
27 : "=r" (v) \
28 : "r" (r), "Ir" (o)); \
29 v; \
30 })
31
32#define __arch_base_getl(b,o) \
33 ({ \
34 unsigned int v, r = (b); \
35 __asm__ __volatile__( \
36 "ldr %0, [%1, %2]" \
37 : "=r" (v) \
38 : "r" (r), "Ir" (o)); \
39 v; \
40 })
41
42#define __arch_base_putb(v,b,o) \
43 ({ \
44 unsigned int r = (b); \
45 __asm__ __volatile__( \
46 "strb %0, [%1, %2]" \
47 : \
48 : "r" (v), "r" (r), "Ir" (o)); \
49 })
50
51#define __arch_base_putl(v,b,o) \
52 ({ \
53 unsigned int r = (b); \
54 __asm__ __volatile__( \
55 "str %0, [%1, %2]" \
56 : \
57 : "r" (v), "r" (r), "Ir" (o)); \
58 })
59
60/*
61 * We use two different types of addressing - PC style addresses, and ARM
62 * addresses. PC style accesses the PC hardware with the normal PC IO
63 * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
64 * and are translated to the start of IO. Note that all addresses are
65 * shifted left!
66 */
67#define __PORT_PCIO(x) (!((x) & 0x80000000))
68
69/*
70 * Dynamic IO functions - let the compiler
71 * optimize the expressions
72 */
73static inline void __outb (unsigned int value, unsigned int port)
74{
75 unsigned long temp;
76 __asm__ __volatile__(
77 "tst %2, #0x80000000\n\t"
78 "mov %0, %4\n\t"
79 "addeq %0, %0, %3\n\t"
80 "strb %1, [%0, %2, lsl #2] @ outb"
81 : "=&r" (temp)
82 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
83 : "cc");
84}
85
86static inline void __outw (unsigned int value, unsigned int port)
87{
88 unsigned long temp;
89 __asm__ __volatile__(
90 "tst %2, #0x80000000\n\t"
91 "mov %0, %4\n\t"
92 "addeq %0, %0, %3\n\t"
93 "str %1, [%0, %2, lsl #2] @ outw"
94 : "=&r" (temp)
95 : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
96 : "cc");
97}
98
99static inline void __outl (unsigned int value, unsigned int port)
100{
101 unsigned long temp;
102 __asm__ __volatile__(
103 "tst %2, #0x80000000\n\t"
104 "mov %0, %4\n\t"
105 "addeq %0, %0, %3\n\t"
106 "str %1, [%0, %2, lsl #2] @ outl"
107 : "=&r" (temp)
108 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
109 : "cc");
110}
111
112#define DECLARE_DYN_IN(sz,fnsuffix,instr) \
113static inline unsigned sz __in##fnsuffix (unsigned int port) \
114{ \
115 unsigned long temp, value; \
116 __asm__ __volatile__( \
117 "tst %2, #0x80000000\n\t" \
118 "mov %0, %4\n\t" \
119 "addeq %0, %0, %3\n\t" \
120 "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \
121 : "=&r" (temp), "=r" (value) \
122 : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
123 : "cc"); \
124 return (unsigned sz)value; \
125}
126
127static inline unsigned int __ioaddr (unsigned int port) \
128{ \
129 if (__PORT_PCIO(port)) \
130 return (unsigned int)(PCIO_BASE + (port << 2)); \
131 else \
132 return (unsigned int)(IO_BASE + (port << 2)); \
133}
134
135#define DECLARE_IO(sz,fnsuffix,instr) \
136 DECLARE_DYN_IN(sz,fnsuffix,instr)
137
138DECLARE_IO(char,b,"b")
139DECLARE_IO(short,w,"")
140DECLARE_IO(int,l,"")
141
142#undef DECLARE_IO
143#undef DECLARE_DYN_IN
144
145/*
146 * Constant address IO functions
147 *
148 * These have to be macros for the 'J' constraint to work -
149 * +/-4096 immediate operand.
150 */
151#define __outbc(value,port) \
152({ \
153 if (__PORT_PCIO((port))) \
154 __asm__ __volatile__( \
155 "strb %0, [%1, %2] @ outbc" \
156 : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
157 else \
158 __asm__ __volatile__( \
159 "strb %0, [%1, %2] @ outbc" \
160 : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
161})
162
163#define __inbc(port) \
164({ \
165 unsigned char result; \
166 if (__PORT_PCIO((port))) \
167 __asm__ __volatile__( \
168 "ldrb %0, [%1, %2] @ inbc" \
169 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
170 else \
171 __asm__ __volatile__( \
172 "ldrb %0, [%1, %2] @ inbc" \
173 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
174 result; \
175})
176
177#define __outwc(value,port) \
178({ \
179 unsigned long v = value; \
180 if (__PORT_PCIO((port))) \
181 __asm__ __volatile__( \
182 "str %0, [%1, %2] @ outwc" \
183 : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
184 else \
185 __asm__ __volatile__( \
186 "str %0, [%1, %2] @ outwc" \
187 : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
188})
189
190#define __inwc(port) \
191({ \
192 unsigned short result; \
193 if (__PORT_PCIO((port))) \
194 __asm__ __volatile__( \
195 "ldr %0, [%1, %2] @ inwc" \
196 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
197 else \
198 __asm__ __volatile__( \
199 "ldr %0, [%1, %2] @ inwc" \
200 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
201 result & 0xffff; \
202})
203
204#define __outlc(value,port) \
205({ \
206 unsigned long v = value; \
207 if (__PORT_PCIO((port))) \
208 __asm__ __volatile__( \
209 "str %0, [%1, %2] @ outlc" \
210 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
211 else \
212 __asm__ __volatile__( \
213 "str %0, [%1, %2] @ outlc" \
214 : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \
215})
216
217#define __inlc(port) \
218({ \
219 unsigned long result; \
220 if (__PORT_PCIO((port))) \
221 __asm__ __volatile__( \
222 "ldr %0, [%1, %2] @ inlc" \
223 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
224 else \
225 __asm__ __volatile__( \
226 "ldr %0, [%1, %2] @ inlc" \
227 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
228 result; \
229})
230
231#define __ioaddrc(port) \
232 (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
233
234#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
235#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
236#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
237#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
238#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
239#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
240#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
241/* the following macro is deprecated */
242#define ioaddr(port) __ioaddr((port))
243
244#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
245#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
246
247#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
248#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
249
250/*
251 * 1:1 mapping for ioremapped regions.
252 */
253#define __mem_pci(x) (x)
254
255#endif
diff --git a/arch/arm/mach-clps7500/include/mach/irq.h b/arch/arm/mach-clps7500/include/mach/irq.h
new file mode 100644
index 000000000000..e8da3c58df76
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/irq.h
@@ -0,0 +1,32 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/irq.h
3 *
4 * Copyright (C) 1996 Russell King
5 * Copyright (C) 1999, 2001 Nexus Electronics Ltd.
6 *
7 * Changelog:
8 * 10-10-1996 RMK Brought up to date with arch-sa110eval
9 * 22-08-1998 RMK Restructured IRQ routines
10 * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code
11 */
12
13#include <asm/hardware/iomd.h>
14#include <asm/io.h>
15
16static inline int fixup_irq(unsigned int irq)
17{
18 if (irq == IRQ_ISA) {
19 int isabits = *((volatile unsigned int *)0xe002b700);
20 if (isabits == 0) {
21 printk("Spurious ISA IRQ!\n");
22 return irq;
23 }
24 irq = IRQ_ISA_BASE;
25 while (!(isabits & 1)) {
26 irq++;
27 isabits >>= 1;
28 }
29 }
30
31 return irq;
32}
diff --git a/arch/arm/mach-clps7500/include/mach/irqs.h b/arch/arm/mach-clps7500/include/mach/irqs.h
new file mode 100644
index 000000000000..bee66b487f59
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/irqs.h
@@ -0,0 +1,66 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/irqs.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd
5 */
6
7#define IRQ_INT2 0
8#define IRQ_INT1 2
9#define IRQ_VSYNCPULSE 3
10#define IRQ_POWERON 4
11#define IRQ_TIMER0 5
12#define IRQ_TIMER1 6
13#define IRQ_FORCE 7
14#define IRQ_INT8 8
15#define IRQ_ISA 9
16#define IRQ_INT6 10
17#define IRQ_INT5 11
18#define IRQ_INT4 12
19#define IRQ_INT3 13
20#define IRQ_KEYBOARDTX 14
21#define IRQ_KEYBOARDRX 15
22
23#define IRQ_DMA0 16
24#define IRQ_DMA1 17
25#define IRQ_DMA2 18
26#define IRQ_DMA3 19
27#define IRQ_DMAS0 20
28#define IRQ_DMAS1 21
29
30#define IRQ_IOP0 24
31#define IRQ_IOP1 25
32#define IRQ_IOP2 26
33#define IRQ_IOP3 27
34#define IRQ_IOP4 28
35#define IRQ_IOP5 29
36#define IRQ_IOP6 30
37#define IRQ_IOP7 31
38
39#define IRQ_MOUSERX 40
40#define IRQ_MOUSETX 41
41#define IRQ_ADC 42
42#define IRQ_EVENT1 43
43#define IRQ_EVENT2 44
44
45#define IRQ_ISA_BASE 48
46#define IRQ_ISA_3 48
47#define IRQ_ISA_4 49
48#define IRQ_ISA_5 50
49#define IRQ_ISA_7 51
50#define IRQ_ISA_9 52
51#define IRQ_ISA_10 53
52#define IRQ_ISA_11 54
53#define IRQ_ISA_14 55
54
55#define FIQ_INT9 0
56#define FIQ_INT5 1
57#define FIQ_INT6 4
58#define FIQ_INT8 6
59#define FIQ_FORCE 7
60
61/*
62 * This is the offset of the FIQ "IRQ" numbers
63 */
64#define FIQ_START 64
65
66#define IRQ_TIMER IRQ_TIMER0
diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h
new file mode 100644
index 000000000000..3326aa99d3ec
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/memory.h
@@ -0,0 +1,35 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/memory.h
3 *
4 * Copyright (c) 1996,1997,1998 Russell King.
5 *
6 * Changelog:
7 * 20-Oct-1996 RMK Created
8 * 31-Dec-1997 RMK Fixed definitions to reduce warnings
9 * 11-Jan-1998 RMK Uninlined to reduce hits on cache
10 * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
11 * 21-Mar-1999 RMK Renamed to memory.h
12 * RMK Added TASK_SIZE and PAGE_OFFSET
13 */
14#ifndef __ASM_ARCH_MEMORY_H
15#define __ASM_ARCH_MEMORY_H
16
17/*
18 * Physical DRAM offset.
19 */
20#define PHYS_OFFSET UL(0x10000000)
21
22/*
23 * These are exactly the same on the RiscPC as the
24 * physical memory view.
25 */
26#define __virt_to_bus(x) __virt_to_phys(x)
27#define __bus_to_virt(x) __phys_to_virt(x)
28
29/*
30 * Cache flushing area - ROM
31 */
32#define FLUSH_BASE_PHYS 0x00000000
33#define FLUSH_BASE 0xdf000000
34
35#endif
diff --git a/arch/arm/mach-clps7500/include/mach/system.h b/arch/arm/mach-clps7500/include/mach/system.h
new file mode 100644
index 000000000000..624fc2830ae0
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/system.h
@@ -0,0 +1,23 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/system.h
3 *
4 * Copyright (c) 1999 Nexus Electronics Ltd.
5 */
6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H
8
9#include <asm/hardware/iomd.h>
10#include <asm/io.h>
11
12static inline void arch_idle(void)
13{
14 iomd_writeb(0, IOMD_SUSMODE);
15}
16
17#define arch_reset(mode) \
18 do { \
19 iomd_writeb(0, IOMD_ROMCR0); \
20 cpu_reset(0); \
21 } while (0)
22
23#endif
diff --git a/arch/arm/mach-clps7500/include/mach/timex.h b/arch/arm/mach-clps7500/include/mach/timex.h
new file mode 100644
index 000000000000..dfaa9b425757
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/timex.h
@@ -0,0 +1,13 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/timex.h
3 *
4 * CL7500 architecture timex specifications
5 *
6 * Copyright (C) 1999 Nexus Electronics Ltd
7 */
8
9/*
10 * On the ARM7500, the clock ticks at 2MHz.
11 */
12#define CLOCK_TICK_RATE 2000000
13
diff --git a/arch/arm/mach-clps7500/include/mach/uncompress.h b/arch/arm/mach-clps7500/include/mach/uncompress.h
new file mode 100644
index 000000000000..d7d0af4b49fc
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/uncompress.h
@@ -0,0 +1,35 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/uncompress.h
3 *
4 * Copyright (C) 1999, 2000 Nexus Electronics Ltd.
5 */
6#define BASE 0x03010000
7#define SERBASE (BASE + (0x2f8 << 2))
8
9static inline void putc(char c)
10{
11 while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20))
12 barrier();
13
14 *((volatile unsigned int *)(SERBASE)) = c;
15}
16
17static inline void flush(void)
18{
19}
20
21static __inline__ void arch_decomp_setup(void)
22{
23 int baud = 3686400 / (9600 * 32);
24
25 *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80;
26 *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff;
27 *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8;
28 *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */
29 *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */
30}
31
32/*
33 * nothing to do
34 */
35#define arch_decomp_wdog()
diff --git a/arch/arm/mach-clps7500/include/mach/vmalloc.h b/arch/arm/mach-clps7500/include/mach/vmalloc.h
new file mode 100644
index 000000000000..8fc5406d1b6d
--- /dev/null
+++ b/arch/arm/mach-clps7500/include/mach/vmalloc.h
@@ -0,0 +1,4 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/vmalloc.h
3 */
4#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-02 22:24:35 -0500