diff options
author | Alexander Shiyan <shc_work@mail.ru> | 2012-11-17 08:57:14 -0500 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-11-21 12:57:42 -0500 |
commit | 99f04c8f69753e4032059eeb0c21197948e459f7 (patch) | |
tree | 876d54413124fb63dcab9d95446a8686953d2414 /arch/arm/mach-clps711x/include | |
parent | 0d8be81c0e15ad8ebdd35bbbeb35b03f85a4b558 (diff) |
ARM: clps711x: Implement usage "MULTI_IRQ_HANDLER" kernel option for a platform
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-clps711x/include')
-rw-r--r-- | arch/arm/mach-clps711x/include/mach/entry-macro.S | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S deleted file mode 100644 index 56e5c2c23504..000000000000 --- a/arch/arm/mach-clps711x/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-clps711x/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for CLPS711X-based platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | #include <mach/hardware.h> | ||
11 | |||
12 | .macro get_irqnr_preamble, base, tmp | ||
13 | .endm | ||
14 | |||
15 | #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) | ||
16 | #error INTSR stride != INTMR stride | ||
17 | #endif | ||
18 | |||
19 | .macro get_irqnr_and_base, irqnr, stat, base, mask | ||
20 | mov \base, #CLPS711X_VIRT_BASE | ||
21 | ldr \stat, [\base, #INTSR1] | ||
22 | ldr \mask, [\base, #INTMR1] | ||
23 | mov \irqnr, #4 | ||
24 | mov \mask, \mask, lsl #16 | ||
25 | and \stat, \stat, \mask, lsr #16 | ||
26 | movs \stat, \stat, lsr #4 | ||
27 | bne 1001f | ||
28 | |||
29 | add \base, \base, #INTSR2 - INTSR1 | ||
30 | ldr \stat, [\base, #INTSR1] | ||
31 | ldr \mask, [\base, #INTMR1] | ||
32 | mov \irqnr, #16 | ||
33 | mov \mask, \mask, lsl #16 | ||
34 | and \stat, \stat, \mask, lsr #16 | ||
35 | |||
36 | 1001: tst \stat, #255 | ||
37 | addeq \irqnr, \irqnr, #8 | ||
38 | moveq \stat, \stat, lsr #8 | ||
39 | tst \stat, #15 | ||
40 | addeq \irqnr, \irqnr, #4 | ||
41 | moveq \stat, \stat, lsr #4 | ||
42 | tst \stat, #3 | ||
43 | addeq \irqnr, \irqnr, #2 | ||
44 | moveq \stat, \stat, lsr #2 | ||
45 | tst \stat, #1 | ||
46 | addeq \irqnr, \irqnr, #1 | ||
47 | moveq \stat, \stat, lsr #1 | ||
48 | tst \stat, #1 @ bit 0 should be set | ||
49 | .endm | ||
50 | |||
51 | |||