ARM: clps711x: make all virtual addresses definition via one macro

This patch make all virtual addresses definition via one macro.
This modification allows to avoid warning "BUG: mapping for 0x80000000
at 0xff000000 out of vmalloc space".

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 13 insertions, 43 deletions

diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 8497775d6ee5..0a3df25ffea7 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -24,7 +24,10 @@
 
 #include <mach/clps711x.h>
 
-#define CLPS711X_VIRT_BASE      IOMEM(0xff000000)
+#define IO_ADDRESS(x)           (0xdc000000 + (((x) & 0x03ffffff) | \
+                                (((x) >> 2) & 0x3c000000)))
+
+#define CLPS711X_VIRT_BASE      IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE))
 
 #ifndef __ASSEMBLY__
 #define clps_readb(off)         readb(CLPS711X_VIRT_BASE + (off))
@@ -61,58 +64,25 @@
 #define CS7_PHYS_BASE           (0x00000000)
 #endif
 
-#define SYSPLD_VIRT_BASE        0xfe000000
-#define SYSPLD_BASE             SYSPLD_VIRT_BASE
-
 #if defined (CONFIG_ARCH_CDB89712)
 
-#define ETHER_START      0x20000000
-#define ETHER_SIZE       0x1000
-#define ETHER_BASE       0xfe000000
+#define ETHER_PHYS_BASE         CS2_PHYS_BASE
+#define ETHER_SIZE              0x1000
 
 #endif
 
 
 #if defined (CONFIG_ARCH_EDB7211)
 
-/*
- * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3) 
- * and repeat across it. This is the mapping for it.
- *
- * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This 
- * was cause for much consternation and headscratching. This should probably
- * be made a compile/run time kernel option.
- */
-#define EP7211_PHYS_EXTKBD              CS3_PHYS_BASE   /* physical */
-
-#define EP7211_VIRT_EXTKBD              (0xfd000000)    /* virtual */
-
-
-/*
- * The CS8900A ethernet chip has its I/O registers wired to chip select 2 
- * (nCS2). This is the mapping for it.
- *
- * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This 
- * was cause for much consternation and headscratching. This should probably
- * be made a compile/run time kernel option.
- */
-#define EP7211_PHYS_CS8900A             CS2_PHYS_BASE   /* physical */
-
-#define EP7211_VIRT_CS8900A             (0xfc000000)    /* virtual */
+/* The extra 8 lines of the keyboard matrix are wired to chip select 3 */
+#define EP7211_PHYS_EXTKBD      CS3_PHYS_BASE
 
+/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
+#define EP7211_PHYS_CS8900A     CS2_PHYS_BASE
 
-/*
- * The two flash banks are wired to chip selects 0 and 1. This is the mapping
- * for them.
- *
- * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
- * in jumpered boot mode.
- */
-#define EP7211_PHYS_FLASH1              CS0_PHYS_BASE   /* physical */
-#define EP7211_PHYS_FLASH2              CS1_PHYS_BASE   /* physical */
-
-#define EP7211_VIRT_FLASH1              (0xfa000000)    /* virtual */
-#define EP7211_VIRT_FLASH2              (0xfb000000)    /* virtual */
+/* The two flash banks are wired to chip selects 0 and 1 */
+#define EP7211_PHYS_FLASH1      CS0_PHYS_BASE
+#define EP7211_PHYS_FLASH2      CS1_PHYS_BASE
 
 #endif /* CONFIG_ARCH_EDB7211 */