diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-13 08:16:39 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-22 17:44:25 -0500 |
commit | 6eda51192fb1c767f792e92c67b9a4fd73c1fcba (patch) | |
tree | c29f3c54b9e165f64419ff5197f308eab5a1f23e /arch/arm/mach-bcmring | |
parent | 132b16325fae0742a02075894af16197e83febe8 (diff) |
ARM: bcmring: update clock source registration
In d7e81c2 (clocksource: Add clocksource_register_hz/khz interface) new
interfaces were added which simplify (and optimize) the selection of the
divisor shift/mult constants. Switch over to using this new interface.
Acked-By: Scott Branden <sbranden@broadcom.com>
Acked-By: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-bcmring')
-rw-r--r-- | arch/arm/mach-bcmring/core.c | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c index d3f959e92b2d..b91b1b0fdff3 100644 --- a/arch/arm/mach-bcmring/core.c +++ b/arch/arm/mach-bcmring/core.c | |||
@@ -294,7 +294,6 @@ static struct clocksource clocksource_bcmring_timer1 = { | |||
294 | .rating = 200, | 294 | .rating = 200, |
295 | .read = bcmring_get_cycles_timer1, | 295 | .read = bcmring_get_cycles_timer1, |
296 | .mask = CLOCKSOURCE_MASK(32), | 296 | .mask = CLOCKSOURCE_MASK(32), |
297 | .shift = 20, | ||
298 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 297 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
299 | }; | 298 | }; |
300 | 299 | ||
@@ -303,7 +302,6 @@ static struct clocksource clocksource_bcmring_timer3 = { | |||
303 | .rating = 100, | 302 | .rating = 100, |
304 | .read = bcmring_get_cycles_timer3, | 303 | .read = bcmring_get_cycles_timer3, |
305 | .mask = CLOCKSOURCE_MASK(32), | 304 | .mask = CLOCKSOURCE_MASK(32), |
306 | .shift = 20, | ||
307 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 305 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
308 | }; | 306 | }; |
309 | 307 | ||
@@ -316,10 +314,8 @@ static int __init bcmring_clocksource_init(void) | |||
316 | writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, | 314 | writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, |
317 | TIMER1_VA_BASE + TIMER_CTRL); | 315 | TIMER1_VA_BASE + TIMER_CTRL); |
318 | 316 | ||
319 | clocksource_bcmring_timer1.mult = | 317 | clocksource_register_khz(&clocksource_bcmring_timer1, |
320 | clocksource_khz2mult(TIMER1_FREQUENCY_MHZ * 1000, | 318 | TIMER1_FREQUENCY_MHZ * 1000); |
321 | clocksource_bcmring_timer1.shift); | ||
322 | clocksource_register(&clocksource_bcmring_timer1); | ||
323 | 319 | ||
324 | /* setup timer3 as free-running clocksource */ | 320 | /* setup timer3 as free-running clocksource */ |
325 | writel(0, TIMER3_VA_BASE + TIMER_CTRL); | 321 | writel(0, TIMER3_VA_BASE + TIMER_CTRL); |
@@ -328,10 +324,8 @@ static int __init bcmring_clocksource_init(void) | |||
328 | writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, | 324 | writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, |
329 | TIMER3_VA_BASE + TIMER_CTRL); | 325 | TIMER3_VA_BASE + TIMER_CTRL); |
330 | 326 | ||
331 | clocksource_bcmring_timer3.mult = | 327 | clocksource_register_khz(&clocksource_bcmring_timer3, |
332 | clocksource_khz2mult(TIMER3_FREQUENCY_KHZ, | 328 | TIMER3_FREQUENCY_KHZ); |
333 | clocksource_bcmring_timer3.shift); | ||
334 | clocksource_register(&clocksource_bcmring_timer3); | ||
335 | 329 | ||
336 | return 0; | 330 | return 0; |
337 | } | 331 | } |