diff options
author | Dom Cobley <popcornmix@gmail.com> | 2012-10-27 23:14:50 -0400 |
---|---|---|
committer | Stephen Warren <swarren@wwwdotorg.org> | 2013-01-14 23:47:00 -0500 |
commit | 45e9d77a22b7b25373c7b8c0ea0b146168025360 (patch) | |
tree | 6874fbf713642b6f7979ff5edf7e9aad95d510ae /arch/arm/mach-bcm2835 | |
parent | 526d239c301e6cb7fe6657642c43d6c524590745 (diff) |
ARM: bcm2835: add a pm_power_off implementation
Add a pm_power_off function that resets the SoC, and indicates to
bootcode.bin not to boot. Should allow a lower power 'off' state, even
if it's not really off.
This is commit 48efdd2 "Add a pm_power_off function that resets us, ..."
downstream.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
[swarren: Various non-semantic rework for upstreaming]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Diffstat (limited to 'arch/arm/mach-bcm2835')
-rw-r--r-- | arch/arm/mach-bcm2835/bcm2835.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c index f0d739f4b7a3..c867d0e8cf7c 100644 --- a/arch/arm/mach-bcm2835/bcm2835.c +++ b/arch/arm/mach-bcm2835/bcm2835.c | |||
@@ -26,11 +26,13 @@ | |||
26 | #include <mach/bcm2835_soc.h> | 26 | #include <mach/bcm2835_soc.h> |
27 | 27 | ||
28 | #define PM_RSTC 0x1c | 28 | #define PM_RSTC 0x1c |
29 | #define PM_RSTS 0x20 | ||
29 | #define PM_WDOG 0x24 | 30 | #define PM_WDOG 0x24 |
30 | 31 | ||
31 | #define PM_PASSWORD 0x5a000000 | 32 | #define PM_PASSWORD 0x5a000000 |
32 | #define PM_RSTC_WRCFG_MASK 0x00000030 | 33 | #define PM_RSTC_WRCFG_MASK 0x00000030 |
33 | #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 | 34 | #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 |
35 | #define PM_RSTS_HADWRH_SET 0x00000040 | ||
34 | 36 | ||
35 | static void __iomem *wdt_regs; | 37 | static void __iomem *wdt_regs; |
36 | 38 | ||
@@ -67,6 +69,29 @@ static void bcm2835_restart(char mode, const char *cmd) | |||
67 | mdelay(1); | 69 | mdelay(1); |
68 | } | 70 | } |
69 | 71 | ||
72 | /* | ||
73 | * We can't really power off, but if we do the normal reset scheme, and | ||
74 | * indicate to bootcode.bin not to reboot, then most of the chip will be | ||
75 | * powered off. | ||
76 | */ | ||
77 | static void bcm2835_power_off(void) | ||
78 | { | ||
79 | u32 val; | ||
80 | |||
81 | /* | ||
82 | * We set the watchdog hard reset bit here to distinguish this reset | ||
83 | * from the normal (full) reset. bootcode.bin will not reboot after a | ||
84 | * hard reset. | ||
85 | */ | ||
86 | val = readl_relaxed(wdt_regs + PM_RSTS); | ||
87 | val &= ~PM_RSTC_WRCFG_MASK; | ||
88 | val |= PM_PASSWORD | PM_RSTS_HADWRH_SET; | ||
89 | writel_relaxed(val, wdt_regs + PM_RSTS); | ||
90 | |||
91 | /* Continue with normal reset mechanism */ | ||
92 | bcm2835_restart(0, ""); | ||
93 | } | ||
94 | |||
70 | static struct map_desc io_map __initdata = { | 95 | static struct map_desc io_map __initdata = { |
71 | .virtual = BCM2835_PERIPH_VIRT, | 96 | .virtual = BCM2835_PERIPH_VIRT, |
72 | .pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS), | 97 | .pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS), |
@@ -84,6 +109,9 @@ static void __init bcm2835_init(void) | |||
84 | int ret; | 109 | int ret; |
85 | 110 | ||
86 | bcm2835_setup_restart(); | 111 | bcm2835_setup_restart(); |
112 | if (wdt_regs) | ||
113 | pm_power_off = bcm2835_power_off; | ||
114 | |||
87 | bcm2835_init_clocks(); | 115 | bcm2835_init_clocks(); |
88 | 116 | ||
89 | ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, | 117 | ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, |