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authorAndrew Victor <andrew@sanpeople.com>2006-07-05 12:22:52 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-07-05 12:22:52 -0400
commitba854e18413d2d827f050984edeb8286c3335895 (patch)
tree08c17a14d67243f2076c3d148bc469befae80f46 /arch/arm/mach-at91rm9200/irq.c
parent5904a7f9167cdeb95569799e0be652c2ce6d3298 (diff)
[ARM] 3711/1: AT91 timer update
Patch from Andrew Victor The AIC interrupt controller is the same on the Atmel AT91RM9200, AT91SAM9261 and AT91SAM9260 processors. This patch removes any RM9200-specific naming from the IRQ driver, and moves the AT91RM9200's default IRQ priority table into at91rm9200.c. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91rm9200/irq.c')
-rw-r--r--arch/arm/mach-at91rm9200/irq.c70
1 files changed, 14 insertions, 56 deletions
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index dcd560dbcfb7..9b0911320417 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -36,58 +36,20 @@
36 36
37#include "generic.h" 37#include "generic.h"
38 38
39/*
40 * The default interrupt priority levels (0 = lowest, 7 = highest).
41 */
42static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
43 7, /* Advanced Interrupt Controller */
44 7, /* System Peripheral */
45 0, /* Parallel IO Controller A */
46 0, /* Parallel IO Controller B */
47 0, /* Parallel IO Controller C */
48 0, /* Parallel IO Controller D */
49 6, /* USART 0 */
50 6, /* USART 1 */
51 6, /* USART 2 */
52 6, /* USART 3 */
53 0, /* Multimedia Card Interface */
54 4, /* USB Device Port */
55 0, /* Two-Wire Interface */
56 6, /* Serial Peripheral Interface */
57 5, /* Serial Synchronous Controller */
58 5, /* Serial Synchronous Controller */
59 5, /* Serial Synchronous Controller */
60 0, /* Timer Counter 0 */
61 0, /* Timer Counter 1 */
62 0, /* Timer Counter 2 */
63 0, /* Timer Counter 3 */
64 0, /* Timer Counter 4 */
65 0, /* Timer Counter 5 */
66 3, /* USB Host port */
67 3, /* Ethernet MAC */
68 0, /* Advanced Interrupt Controller */
69 0, /* Advanced Interrupt Controller */
70 0, /* Advanced Interrupt Controller */
71 0, /* Advanced Interrupt Controller */
72 0, /* Advanced Interrupt Controller */
73 0, /* Advanced Interrupt Controller */
74 0 /* Advanced Interrupt Controller */
75};
76 39
77 40static void at91_aic_mask_irq(unsigned int irq)
78static void at91rm9200_mask_irq(unsigned int irq)
79{ 41{
80 /* Disable interrupt on AIC */ 42 /* Disable interrupt on AIC */
81 at91_sys_write(AT91_AIC_IDCR, 1 << irq); 43 at91_sys_write(AT91_AIC_IDCR, 1 << irq);
82} 44}
83 45
84static void at91rm9200_unmask_irq(unsigned int irq) 46static void at91_aic_unmask_irq(unsigned int irq)
85{ 47{
86 /* Enable interrupt on AIC */ 48 /* Enable interrupt on AIC */
87 at91_sys_write(AT91_AIC_IECR, 1 << irq); 49 at91_sys_write(AT91_AIC_IECR, 1 << irq);
88} 50}
89 51
90static int at91rm9200_irq_type(unsigned irq, unsigned type) 52static int at91_aic_set_type(unsigned irq, unsigned type)
91{ 53{
92 unsigned int smr, srctype; 54 unsigned int smr, srctype;
93 55
@@ -122,7 +84,7 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type)
122static u32 wakeups; 84static u32 wakeups;
123static u32 backups; 85static u32 backups;
124 86
125static int at91rm9200_irq_set_wake(unsigned irq, unsigned value) 87static int at91_aic_set_wake(unsigned irq, unsigned value)
126{ 88{
127 if (unlikely(irq >= 32)) 89 if (unlikely(irq >= 32))
128 return -EINVAL; 90 return -EINVAL;
@@ -149,28 +111,24 @@ void at91_irq_resume(void)
149} 111}
150 112
151#else 113#else
152#define at91rm9200_irq_set_wake NULL 114#define at91_aic_set_wake NULL
153#endif 115#endif
154 116
155static struct irqchip at91rm9200_irq_chip = { 117static struct irqchip at91_aic_chip = {
156 .ack = at91rm9200_mask_irq, 118 .ack = at91_aic_mask_irq,
157 .mask = at91rm9200_mask_irq, 119 .mask = at91_aic_mask_irq,
158 .unmask = at91rm9200_unmask_irq, 120 .unmask = at91_aic_unmask_irq,
159 .set_type = at91rm9200_irq_type, 121 .set_type = at91_aic_set_type,
160 .set_wake = at91rm9200_irq_set_wake, 122 .set_wake = at91_aic_set_wake,
161}; 123};
162 124
163/* 125/*
164 * Initialize the AIC interrupt controller. 126 * Initialize the AIC interrupt controller.
165 */ 127 */
166void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS]) 128void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
167{ 129{
168 unsigned int i; 130 unsigned int i;
169 131
170 /* No priority list specified for this board -> use defaults */
171 if (priority == NULL)
172 priority = at91rm9200_default_irq_priority;
173
174 /* 132 /*
175 * The IVR is used by macro get_irqnr_and_base to read and verify. 133 * The IVR is used by macro get_irqnr_and_base to read and verify.
176 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. 134 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
@@ -178,10 +136,10 @@ void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS])
178 for (i = 0; i < NR_AIC_IRQS; i++) { 136 for (i = 0; i < NR_AIC_IRQS; i++) {
179 /* Put irq number in Source Vector Register: */ 137 /* Put irq number in Source Vector Register: */
180 at91_sys_write(AT91_AIC_SVR(i), i); 138 at91_sys_write(AT91_AIC_SVR(i), i);
181 /* Store the Source Mode Register as defined in table above */ 139 /* Active Low interrupt, with the specified priority */
182 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 140 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
183 141
184 set_irq_chip(i, &at91rm9200_irq_chip); 142 set_irq_chip(i, &at91_aic_chip);
185 set_irq_handler(i, do_level_IRQ); 143 set_irq_handler(i, do_level_IRQ);
186 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 144 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
187 145