Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits)
  [ARM] 3541/2: workaround for PXA27x erratum E7
  [ARM] nommu: provide a way for correct control register value selection
  [ARM] 3705/1: add supersection support to ioremap()
  [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure
  [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support
  [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency
  [ARM] 3703/1: Add help description for ARCH_EP80219
  [ARM] 3678/1: MMC: Make OMAP MMC work
  [ARM] 3677/1: OMAP: Update H2 defconfig
  [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1
  [ARM] Add section support to ioremap
  [ARM] Fix sa11x0 SDRAM selection
  [ARM] Set bit 4 on section mappings correctly depending on CPU
  [ARM] 3666/1: TRIZEPS4 [1/5] core
  ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring
  ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE
  ARM: OMAP: Update dmtimers
  ARM: OMAP: Make clock variables static
  ARM: OMAP: Fix GPMC compilation when DEBUG is defined
  ARM: OMAP: Mux updates for external DMA and GPIO
  ...

1 files changed, 109 insertions, 0 deletions

diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c
new file mode 100644
index 000000000000..7e1d072bdd80
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -0,0 +1,109 @@
+/*
+ * arch/arm/mach-at91rm9200/at91rm9200.c
+ *
+ *  Copyright (C) 2005 SAN People
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/hardware.h>
+#include "generic.h"
+
+static struct map_desc at91rm9200_io_desc[] __initdata = {
+        {
+                .virtual        = AT91_VA_BASE_SYS,
+                .pfn            = __phys_to_pfn(AT91_BASE_SYS),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_SPI,
+                .pfn            = __phys_to_pfn(AT91_BASE_SPI),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_SSC2,
+                .pfn            = __phys_to_pfn(AT91_BASE_SSC2),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_SSC1,
+                .pfn            = __phys_to_pfn(AT91_BASE_SSC1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_SSC0,
+                .pfn            = __phys_to_pfn(AT91_BASE_SSC0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_US3,
+                .pfn            = __phys_to_pfn(AT91_BASE_US3),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_US2,
+                .pfn            = __phys_to_pfn(AT91_BASE_US2),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_US1,
+                .pfn            = __phys_to_pfn(AT91_BASE_US1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_US0,
+                .pfn            = __phys_to_pfn(AT91_BASE_US0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_EMAC,
+                .pfn            = __phys_to_pfn(AT91_BASE_EMAC),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_TWI,
+                .pfn            = __phys_to_pfn(AT91_BASE_TWI),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_MCI,
+                .pfn            = __phys_to_pfn(AT91_BASE_MCI),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_UDP,
+                .pfn            = __phys_to_pfn(AT91_BASE_UDP),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_TCB1,
+                .pfn            = __phys_to_pfn(AT91_BASE_TCB1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_VA_BASE_TCB0,
+                .pfn            = __phys_to_pfn(AT91_BASE_TCB0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_SRAM_VIRT_BASE,
+                .pfn            = __phys_to_pfn(AT91_SRAM_BASE),
+                .length         = AT91_SRAM_SIZE,
+                .type           = MT_DEVICE,
+        },
+};
+
+void __init at91rm9200_map_io(void)
+{
+        iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
+}
+