diff options
| author | Andrew Victor <andrew@sanpeople.com> | 2006-09-27 04:44:11 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-28 06:52:05 -0400 |
| commit | 72729910c38ca5b4736032c15dc3f9d48fe4f68a (patch) | |
| tree | e7461ec8e0ff07d1634d7d7a467cb8454135a5c8 /arch/arm/mach-at91rm9200/at91rm9200.c | |
| parent | 26f908186f923291999833e9d563259834bdca06 (diff) | |
[ARM] 3865/1: AT91RM9200 header updates
This is more preparation for adding support for the new Atmel AT91SAM9
processors.
Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91rm9200/at91rm9200.c')
| -rw-r--r-- | arch/arm/mach-at91rm9200/at91rm9200.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c index 0985b1c42c7c..e21cb845d112 100644 --- a/arch/arm/mach-at91rm9200/at91rm9200.c +++ b/arch/arm/mach-at91rm9200/at91rm9200.c | |||
| @@ -26,78 +26,78 @@ static struct map_desc at91rm9200_io_desc[] __initdata = { | |||
| 26 | .type = MT_DEVICE, | 26 | .type = MT_DEVICE, |
| 27 | }, { | 27 | }, { |
| 28 | .virtual = AT91_VA_BASE_SPI, | 28 | .virtual = AT91_VA_BASE_SPI, |
| 29 | .pfn = __phys_to_pfn(AT91_BASE_SPI), | 29 | .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI), |
| 30 | .length = SZ_16K, | 30 | .length = SZ_16K, |
| 31 | .type = MT_DEVICE, | 31 | .type = MT_DEVICE, |
| 32 | }, { | 32 | }, { |
| 33 | .virtual = AT91_VA_BASE_SSC2, | 33 | .virtual = AT91_VA_BASE_SSC2, |
| 34 | .pfn = __phys_to_pfn(AT91_BASE_SSC2), | 34 | .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC2), |
| 35 | .length = SZ_16K, | 35 | .length = SZ_16K, |
| 36 | .type = MT_DEVICE, | 36 | .type = MT_DEVICE, |
| 37 | }, { | 37 | }, { |
| 38 | .virtual = AT91_VA_BASE_SSC1, | 38 | .virtual = AT91_VA_BASE_SSC1, |
| 39 | .pfn = __phys_to_pfn(AT91_BASE_SSC1), | 39 | .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC1), |
| 40 | .length = SZ_16K, | 40 | .length = SZ_16K, |
| 41 | .type = MT_DEVICE, | 41 | .type = MT_DEVICE, |
| 42 | }, { | 42 | }, { |
| 43 | .virtual = AT91_VA_BASE_SSC0, | 43 | .virtual = AT91_VA_BASE_SSC0, |
| 44 | .pfn = __phys_to_pfn(AT91_BASE_SSC0), | 44 | .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC0), |
| 45 | .length = SZ_16K, | 45 | .length = SZ_16K, |
| 46 | .type = MT_DEVICE, | 46 | .type = MT_DEVICE, |
| 47 | }, { | 47 | }, { |
| 48 | .virtual = AT91_VA_BASE_US3, | 48 | .virtual = AT91_VA_BASE_US3, |
| 49 | .pfn = __phys_to_pfn(AT91_BASE_US3), | 49 | .pfn = __phys_to_pfn(AT91RM9200_BASE_US3), |
| 50 | .length = SZ_16K, | 50 | .length = SZ_16K, |
| 51 | .type = MT_DEVICE, | 51 | .type = MT_DEVICE, |
| 52 | }, { | 52 | }, { |
| 53 | .virtual = AT91_VA_BASE_US2, | 53 | .virtual = AT91_VA_BASE_US2, |
| 54 | .pfn = __phys_to_pfn(AT91_BASE_US2), | 54 | .pfn = __phys_to_pfn(AT91RM9200_BASE_US2), |
| 55 | .length = SZ_16K, | 55 | .length = SZ_16K, |
| 56 | .type = MT_DEVICE, | 56 | .type = MT_DEVICE, |
| 57 | }, { | 57 | }, { |
| 58 | .virtual = AT91_VA_BASE_US1, | 58 | .virtual = AT91_VA_BASE_US1, |
| 59 | .pfn = __phys_to_pfn(AT91_BASE_US1), | 59 | .pfn = __phys_to_pfn(AT91RM9200_BASE_US1), |
| 60 | .length = SZ_16K, | 60 | .length = SZ_16K, |
| 61 | .type = MT_DEVICE, | 61 | .type = MT_DEVICE, |
| 62 | }, { | 62 | }, { |
| 63 | .virtual = AT91_VA_BASE_US0, | 63 | .virtual = AT91_VA_BASE_US0, |
| 64 | .pfn = __phys_to_pfn(AT91_BASE_US0), | 64 | .pfn = __phys_to_pfn(AT91RM9200_BASE_US0), |
| 65 | .length = SZ_16K, | 65 | .length = SZ_16K, |
| 66 | .type = MT_DEVICE, | 66 | .type = MT_DEVICE, |
| 67 | }, { | 67 | }, { |
| 68 | .virtual = AT91_VA_BASE_EMAC, | 68 | .virtual = AT91_VA_BASE_EMAC, |
| 69 | .pfn = __phys_to_pfn(AT91_BASE_EMAC), | 69 | .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), |
| 70 | .length = SZ_16K, | 70 | .length = SZ_16K, |
| 71 | .type = MT_DEVICE, | 71 | .type = MT_DEVICE, |
| 72 | }, { | 72 | }, { |
| 73 | .virtual = AT91_VA_BASE_TWI, | 73 | .virtual = AT91_VA_BASE_TWI, |
| 74 | .pfn = __phys_to_pfn(AT91_BASE_TWI), | 74 | .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI), |
| 75 | .length = SZ_16K, | 75 | .length = SZ_16K, |
| 76 | .type = MT_DEVICE, | 76 | .type = MT_DEVICE, |
| 77 | }, { | 77 | }, { |
| 78 | .virtual = AT91_VA_BASE_MCI, | 78 | .virtual = AT91_VA_BASE_MCI, |
| 79 | .pfn = __phys_to_pfn(AT91_BASE_MCI), | 79 | .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI), |
| 80 | .length = SZ_16K, | 80 | .length = SZ_16K, |
| 81 | .type = MT_DEVICE, | 81 | .type = MT_DEVICE, |
| 82 | }, { | 82 | }, { |
| 83 | .virtual = AT91_VA_BASE_UDP, | 83 | .virtual = AT91_VA_BASE_UDP, |
| 84 | .pfn = __phys_to_pfn(AT91_BASE_UDP), | 84 | .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP), |
| 85 | .length = SZ_16K, | 85 | .length = SZ_16K, |
| 86 | .type = MT_DEVICE, | 86 | .type = MT_DEVICE, |
| 87 | }, { | 87 | }, { |
| 88 | .virtual = AT91_VA_BASE_TCB1, | 88 | .virtual = AT91_VA_BASE_TCB1, |
| 89 | .pfn = __phys_to_pfn(AT91_BASE_TCB1), | 89 | .pfn = __phys_to_pfn(AT91RM9200_BASE_TCB1), |
| 90 | .length = SZ_16K, | 90 | .length = SZ_16K, |
| 91 | .type = MT_DEVICE, | 91 | .type = MT_DEVICE, |
| 92 | }, { | 92 | }, { |
| 93 | .virtual = AT91_VA_BASE_TCB0, | 93 | .virtual = AT91_VA_BASE_TCB0, |
| 94 | .pfn = __phys_to_pfn(AT91_BASE_TCB0), | 94 | .pfn = __phys_to_pfn(AT91RM9200_BASE_TCB0), |
| 95 | .length = SZ_16K, | 95 | .length = SZ_16K, |
| 96 | .type = MT_DEVICE, | 96 | .type = MT_DEVICE, |
| 97 | }, { | 97 | }, { |
| 98 | .virtual = AT91_SRAM_VIRT_BASE, | 98 | .virtual = AT91_SRAM_VIRT_BASE, |
| 99 | .pfn = __phys_to_pfn(AT91_SRAM_BASE), | 99 | .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE), |
| 100 | .length = AT91_SRAM_SIZE, | 100 | .length = AT91RM9200_SRAM_SIZE, |
| 101 | .type = MT_DEVICE, | 101 | .type = MT_DEVICE, |
| 102 | }, | 102 | }, |
| 103 | }; | 103 | }; |