diff options
author | Andrew Victor <linux@maxim.org.za> | 2009-02-11 15:39:05 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-02-14 11:03:36 -0500 |
commit | 2b768b6cdbcf7fa0761e6c35c6ea288297582c43 (patch) | |
tree | ceec6ba9cc96ce40cece468b614bd6cfe9902a85 /arch/arm/mach-at91 | |
parent | 2af29b78618ac8b3a8746337002f108f8fdf56ad (diff) |
[ARM] 5391/1: AT91: Enable GPIO clocks earlier
Enable the GPIO clocks earlier in the initialization sequence. This
allow the board-setup code to read and set GPIO pins.
Signed-off-by: Marc Pignat <marc.pignat@hevs.ch>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r-- | arch/arm/mach-at91/gpio.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 9b0447c3d59b..2f7d4977dce9 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c | |||
@@ -490,7 +490,8 @@ postcore_initcall(at91_gpio_debugfs_init); | |||
490 | 490 | ||
491 | /*--------------------------------------------------------------------------*/ | 491 | /*--------------------------------------------------------------------------*/ |
492 | 492 | ||
493 | /* This lock class tells lockdep that GPIO irqs are in a different | 493 | /* |
494 | * This lock class tells lockdep that GPIO irqs are in a different | ||
494 | * category than their parents, so it won't report false recursion. | 495 | * category than their parents, so it won't report false recursion. |
495 | */ | 496 | */ |
496 | static struct lock_class_key gpio_lock_class; | 497 | static struct lock_class_key gpio_lock_class; |
@@ -509,9 +510,6 @@ void __init at91_gpio_irq_setup(void) | |||
509 | unsigned id = this->id; | 510 | unsigned id = this->id; |
510 | unsigned i; | 511 | unsigned i; |
511 | 512 | ||
512 | /* enable PIO controller's clock */ | ||
513 | clk_enable(this->clock); | ||
514 | |||
515 | __raw_writel(~0, this->regbase + PIO_IDR); | 513 | __raw_writel(~0, this->regbase + PIO_IDR); |
516 | 514 | ||
517 | for (i = 0, pin = this->chipbase; i < 32; i++, pin++) { | 515 | for (i = 0, pin = this->chipbase; i < 32; i++, pin++) { |
@@ -556,7 +554,14 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) | |||
556 | data->chipbase = PIN_BASE + i * 32; | 554 | data->chipbase = PIN_BASE + i * 32; |
557 | data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS; | 555 | data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS; |
558 | 556 | ||
559 | /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ | 557 | /* enable PIO controller's clock */ |
558 | clk_enable(data->clock); | ||
559 | |||
560 | /* | ||
561 | * Some processors share peripheral ID between multiple GPIO banks. | ||
562 | * SAM9263 (PIOC, PIOD, PIOE) | ||
563 | * CAP9 (PIOA, PIOB, PIOC, PIOD) | ||
564 | */ | ||
560 | if (last && last->id == data->id) | 565 | if (last && last->id == data->id) |
561 | last->next = data; | 566 | last->next = data; |
562 | } | 567 | } |