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authorStelian Pop <stelian@popies.net>2008-10-22 08:52:08 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-12-01 12:22:07 -0500
commit7be90a6ba996e43902fc89704b60a57fd4659a63 (patch)
tree6f6b1b0d0c08d91455d850bdac01086ea38c355f /arch/arm/mach-at91
parentffc63b7d30370e23d7e052df2c1c2c4526464ba6 (diff)
[ARM] 5319/1: AT91: support AT91CAP9 revC CPUs
The AT91CAP9 revC CPU has a few differences over the previous, revB CPU which was distributed in small quantities only (revA was an internal Atmel product only). This patch adds the detection routines to recognize the different AT91CAP9 revisions (based on the PMC subsystem version number), and uses them to: - activate a workaround for the external interrupts levels (on revB CPUs) - set the UDPHS_BYPASS bit (on revB CPUs) - set AT91_GPBR register address to the correct offset (0xfffffd50 on revB, 0xfffffd60 on revC) For debugging usage, the CPU revision can be found in /proc/cpuinfo on the 'Revision' line. This patch is extracted from Andrew Victor's -at91 patch (2.6.27-at91.patch) where it has been tested for the last 6 months. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r--arch/arm/mach-at91/at91cap9.c8
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c17
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c5
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h7
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h4
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h15
6 files changed, 48 insertions, 8 deletions
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 0fc0adaebd58..0a38c69fdbc4 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -17,6 +17,8 @@
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20
21#include <mach/cpu.h>
20#include <mach/at91cap9.h> 22#include <mach/at91cap9.h>
21#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
@@ -317,6 +319,12 @@ void __init at91cap9_initialize(unsigned long main_clock)
317 319
318 /* Register GPIO subsystem */ 320 /* Register GPIO subsystem */
319 at91_gpio_init(at91cap9_gpio, 4); 321 at91_gpio_init(at91cap9_gpio, 4);
322
323 /* Remember the silicon revision */
324 if (cpu_is_at91cap9_revB())
325 system_rev = 0xB;
326 else if (cpu_is_at91cap9_revC())
327 system_rev = 0xC;
320} 328}
321 329
322/* -------------------------------------------------------------------- 330/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 3a36182c50cc..9eca2209cde6 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -13,6 +13,7 @@
13 */ 13 */
14#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
15#include <asm/mach/map.h> 15#include <asm/mach/map.h>
16#include <asm/mach/irq.h>
16 17
17#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
@@ -21,6 +22,7 @@
21#include <video/atmel_lcdc.h> 22#include <video/atmel_lcdc.h>
22 23
23#include <mach/board.h> 24#include <mach/board.h>
25#include <mach/cpu.h>
24#include <mach/gpio.h> 26#include <mach/gpio.h>
25#include <mach/at91cap9.h> 27#include <mach/at91cap9.h>
26#include <mach/at91cap9_matrix.h> 28#include <mach/at91cap9_matrix.h>
@@ -69,6 +71,9 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
69 if (!data) 71 if (!data)
70 return; 72 return;
71 73
74 if (cpu_is_at91cap9_revB())
75 set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
76
72 /* Enable VBus control for UHP ports */ 77 /* Enable VBus control for UHP ports */
73 for (i = 0; i < data->ports; i++) { 78 for (i = 0; i < data->ports; i++) {
74 if (data->vbus_pin[i]) 79 if (data->vbus_pin[i])
@@ -151,8 +156,13 @@ static struct platform_device at91_usba_udc_device = {
151 156
152void __init at91_add_device_usba(struct usba_platform_data *data) 157void __init at91_add_device_usba(struct usba_platform_data *data)
153{ 158{
154 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | 159 if (cpu_is_at91cap9_revB()) {
155 AT91_MATRIX_UDPHS_BYPASS_LOCK); 160 set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
161 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
162 AT91_MATRIX_UDPHS_BYPASS_LOCK);
163 }
164 else
165 at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
156 166
157 /* 167 /*
158 * Invalid pins are 0 on AT91, but the usba driver is shared 168 * Invalid pins are 0 on AT91, but the usba driver is shared
@@ -850,6 +860,9 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
850 if (!data) 860 if (!data)
851 return; 861 return;
852 862
863 if (cpu_is_at91cap9_revB())
864 set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
865
853 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ 866 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
854 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ 867 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
855 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ 868 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 43b37bc91e5f..83a1a0fef47b 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -36,11 +36,9 @@
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <asm/setup.h> 37#include <asm/setup.h>
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39#include <asm/irq.h>
40 39
41#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
42#include <asm/mach/map.h> 41#include <asm/mach/map.h>
43#include <asm/mach/irq.h>
44 42
45#include <mach/board.h> 43#include <mach/board.h>
46#include <mach/gpio.h> 44#include <mach/gpio.h>
@@ -376,10 +374,8 @@ static void __init cap9adk_board_init(void)
376 /* Serial */ 374 /* Serial */
377 at91_add_device_serial(); 375 at91_add_device_serial();
378 /* USB Host */ 376 /* USB Host */
379 set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
380 at91_add_device_usbh(&cap9adk_usbh_data); 377 at91_add_device_usbh(&cap9adk_usbh_data);
381 /* USB HS */ 378 /* USB HS */
382 set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
383 at91_add_device_usba(&cap9adk_usba_udc_data); 379 at91_add_device_usba(&cap9adk_usba_udc_data);
384 /* SPI */ 380 /* SPI */
385 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); 381 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
@@ -396,7 +392,6 @@ static void __init cap9adk_board_init(void)
396 /* I2C */ 392 /* I2C */
397 at91_add_device_i2c(NULL, 0); 393 at91_add_device_i2c(NULL, 0);
398 /* LCD Controller */ 394 /* LCD Controller */
399 set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
400 at91_add_device_lcdc(&cap9adk_lcdc_data); 395 at91_add_device_lcdc(&cap9adk_lcdc_data);
401 /* AC97 */ 396 /* AC97 */
402 at91_add_device_ac97(&cap9adk_ac97_data); 397 at91_add_device_ac97(&cap9adk_ac97_data);
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 2e3f2894b704..9561e33b8a9a 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -23,6 +23,7 @@
23#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ 23#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
24#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ 24#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
25#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ 25#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
26#define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [AT91CAP9 revC only] */
26#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ 27#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */
27#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ 28#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */
28#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ 29#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */
@@ -102,10 +103,16 @@
102#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ 103#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
103#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ 104#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
104#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */ 105#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */
106#define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */
105#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ 107#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
106#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ 108#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
107#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ 109#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
108#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ 110#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
109#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ 111#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
110 112
113#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */
114#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */
115
116#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */
117
111#endif 118#endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 4a4b64135a92..d8c1ededaa75 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -101,7 +101,9 @@
101#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) 101#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
102#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) 102#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
103#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) 103#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
104#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 104#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
105 (0xfffffd50 - AT91_BASE_SYS) : \
106 (0xfffffd60 - AT91_BASE_SYS))
105 107
106#define AT91_USART0 AT91CAP9_BASE_US0 108#define AT91_USART0 AT91CAP9_BASE_US0
107#define AT91_USART1 AT91CAP9_BASE_US1 109#define AT91_USART1 AT91CAP9_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index dbfd9f73f80b..c554c3e4d553 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -49,6 +49,17 @@ static inline unsigned long at91_arch_identify(void)
49 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH); 49 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
50} 50}
51 51
52#ifdef CONFIG_ARCH_AT91CAP9
53#include <mach/at91_pmc.h>
54
55#define ARCH_REVISION_CAP9_B 0x399
56#define ARCH_REVISION_CAP9_C 0x601
57
58static inline unsigned long at91cap9_rev_identify(void)
59{
60 return (at91_sys_read(AT91_PMC_VER));
61}
62#endif
52 63
53#ifdef CONFIG_ARCH_AT91RM9200 64#ifdef CONFIG_ARCH_AT91RM9200
54#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) 65#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
@@ -90,8 +101,12 @@ static inline unsigned long at91_arch_identify(void)
90 101
91#ifdef CONFIG_ARCH_AT91CAP9 102#ifdef CONFIG_ARCH_AT91CAP9
92#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9) 103#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
104#define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
105#define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
93#else 106#else
94#define cpu_is_at91cap9() (0) 107#define cpu_is_at91cap9() (0)
108#define cpu_is_at91cap9_revB() (0)
109#define cpu_is_at91cap9_revC() (0)
95#endif 110#endif
96 111
97/* 112/*