diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-10-31 13:23:20 -0400 |
---|---|---|
committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-28 09:50:38 -0500 |
commit | f22deee523e0ff49c3be01dd6f979d374230725a (patch) | |
tree | e8ef85e51335de930cba58e5d7fb90625590002b /arch/arm/mach-at91 | |
parent | f466f3bc92eb6857181bb033d14b1e9b1dd52140 (diff) |
ARM: at91: make shutdown controler soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r-- | arch/arm/mach-at91/at91cap9.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9261.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9263.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9g45.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9rl.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-at91/board-qil-a9260.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/board-usb-a926x.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/generic.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91_shdwc.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91cap9.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9260.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9261.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9263.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9g45.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/pm.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-at91/setup.c | 17 |
18 files changed, 52 insertions, 67 deletions
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index 1ea931274bac..652dbe1c9cef 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -13,7 +13,6 @@ | |||
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | #include <linux/pm.h> | ||
17 | 16 | ||
18 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
19 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
@@ -23,7 +22,6 @@ | |||
23 | #include <mach/at91cap9.h> | 22 | #include <mach/at91cap9.h> |
24 | #include <mach/at91_pmc.h> | 23 | #include <mach/at91_pmc.h> |
25 | #include <mach/at91_rstc.h> | 24 | #include <mach/at91_rstc.h> |
26 | #include <mach/at91_shdwc.h> | ||
27 | 25 | ||
28 | #include "soc.h" | 26 | #include "soc.h" |
29 | #include "generic.h" | 27 | #include "generic.h" |
@@ -319,12 +317,6 @@ static void at91cap9_reset(void) | |||
319 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | 317 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
320 | } | 318 | } |
321 | 319 | ||
322 | static void at91cap9_poweroff(void) | ||
323 | { | ||
324 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
325 | } | ||
326 | |||
327 | |||
328 | /* -------------------------------------------------------------------- | 320 | /* -------------------------------------------------------------------- |
329 | * AT91CAP9 processor initialization | 321 | * AT91CAP9 processor initialization |
330 | * -------------------------------------------------------------------- */ | 322 | * -------------------------------------------------------------------- */ |
@@ -336,6 +328,7 @@ static void __init at91cap9_map_io(void) | |||
336 | 328 | ||
337 | static void __init at91cap9_ioremap_registers(void) | 329 | static void __init at91cap9_ioremap_registers(void) |
338 | { | 330 | { |
331 | at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC); | ||
339 | at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); | 332 | at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); |
340 | at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); | 333 | at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); |
341 | } | 334 | } |
@@ -343,7 +336,6 @@ static void __init at91cap9_ioremap_registers(void) | |||
343 | static void __init at91cap9_initialize(void) | 336 | static void __init at91cap9_initialize(void) |
344 | { | 337 | { |
345 | at91_arch_reset = at91cap9_reset; | 338 | at91_arch_reset = at91cap9_reset; |
346 | pm_power_off = at91cap9_poweroff; | ||
347 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); | 339 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); |
348 | 340 | ||
349 | /* Register GPIO subsystem */ | 341 | /* Register GPIO subsystem */ |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index fc1f734b80ce..5a17a23724c2 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -21,7 +20,6 @@ | |||
21 | #include <mach/at91sam9260.h> | 20 | #include <mach/at91sam9260.h> |
22 | #include <mach/at91_pmc.h> | 21 | #include <mach/at91_pmc.h> |
23 | #include <mach/at91_rstc.h> | 22 | #include <mach/at91_rstc.h> |
24 | #include <mach/at91_shdwc.h> | ||
25 | 23 | ||
26 | #include "soc.h" | 24 | #include "soc.h" |
27 | #include "generic.h" | 25 | #include "generic.h" |
@@ -287,12 +285,6 @@ static struct at91_gpio_bank at91sam9260_gpio[] = { | |||
287 | } | 285 | } |
288 | }; | 286 | }; |
289 | 287 | ||
290 | static void at91sam9260_poweroff(void) | ||
291 | { | ||
292 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
293 | } | ||
294 | |||
295 | |||
296 | /* -------------------------------------------------------------------- | 288 | /* -------------------------------------------------------------------- |
297 | * AT91SAM9260 processor initialization | 289 | * AT91SAM9260 processor initialization |
298 | * -------------------------------------------------------------------- */ | 290 | * -------------------------------------------------------------------- */ |
@@ -328,6 +320,7 @@ static void __init at91sam9260_map_io(void) | |||
328 | 320 | ||
329 | static void __init at91sam9260_ioremap_registers(void) | 321 | static void __init at91sam9260_ioremap_registers(void) |
330 | { | 322 | { |
323 | at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC); | ||
331 | at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); | 324 | at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); |
332 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); | 325 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); |
333 | } | 326 | } |
@@ -335,7 +328,6 @@ static void __init at91sam9260_ioremap_registers(void) | |||
335 | static void __init at91sam9260_initialize(void) | 328 | static void __init at91sam9260_initialize(void) |
336 | { | 329 | { |
337 | at91_arch_reset = at91sam9_alt_reset; | 330 | at91_arch_reset = at91sam9_alt_reset; |
338 | pm_power_off = at91sam9260_poweroff; | ||
339 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | 331 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
340 | | (1 << AT91SAM9260_ID_IRQ2); | 332 | | (1 << AT91SAM9260_ID_IRQ2); |
341 | 333 | ||
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 804181aedd9e..80e3e0fac6b1 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -20,7 +19,6 @@ | |||
20 | #include <mach/at91sam9261.h> | 19 | #include <mach/at91sam9261.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | 22 | ||
25 | #include "soc.h" | 23 | #include "soc.h" |
26 | #include "generic.h" | 24 | #include "generic.h" |
@@ -268,12 +266,6 @@ static struct at91_gpio_bank at91sam9261_gpio[] = { | |||
268 | } | 266 | } |
269 | }; | 267 | }; |
270 | 268 | ||
271 | static void at91sam9261_poweroff(void) | ||
272 | { | ||
273 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
274 | } | ||
275 | |||
276 | |||
277 | /* -------------------------------------------------------------------- | 269 | /* -------------------------------------------------------------------- |
278 | * AT91SAM9261 processor initialization | 270 | * AT91SAM9261 processor initialization |
279 | * -------------------------------------------------------------------- */ | 271 | * -------------------------------------------------------------------- */ |
@@ -288,6 +280,7 @@ static void __init at91sam9261_map_io(void) | |||
288 | 280 | ||
289 | static void __init at91sam9261_ioremap_registers(void) | 281 | static void __init at91sam9261_ioremap_registers(void) |
290 | { | 282 | { |
283 | at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC); | ||
291 | at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); | 284 | at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); |
292 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); | 285 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); |
293 | } | 286 | } |
@@ -295,7 +288,6 @@ static void __init at91sam9261_ioremap_registers(void) | |||
295 | static void __init at91sam9261_initialize(void) | 288 | static void __init at91sam9261_initialize(void) |
296 | { | 289 | { |
297 | at91_arch_reset = at91sam9_alt_reset; | 290 | at91_arch_reset = at91sam9_alt_reset; |
298 | pm_power_off = at91sam9261_poweroff; | ||
299 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | 291 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) |
300 | | (1 << AT91SAM9261_ID_IRQ2); | 292 | | (1 << AT91SAM9261_ID_IRQ2); |
301 | 293 | ||
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index b8f49962e87f..2a42b99d99d1 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -19,7 +18,6 @@ | |||
19 | #include <mach/at91sam9263.h> | 18 | #include <mach/at91sam9263.h> |
20 | #include <mach/at91_pmc.h> | 19 | #include <mach/at91_pmc.h> |
21 | #include <mach/at91_rstc.h> | 20 | #include <mach/at91_rstc.h> |
22 | #include <mach/at91_shdwc.h> | ||
23 | 21 | ||
24 | #include "soc.h" | 22 | #include "soc.h" |
25 | #include "generic.h" | 23 | #include "generic.h" |
@@ -288,12 +286,6 @@ static struct at91_gpio_bank at91sam9263_gpio[] = { | |||
288 | } | 286 | } |
289 | }; | 287 | }; |
290 | 288 | ||
291 | static void at91sam9263_poweroff(void) | ||
292 | { | ||
293 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
294 | } | ||
295 | |||
296 | |||
297 | /* -------------------------------------------------------------------- | 289 | /* -------------------------------------------------------------------- |
298 | * AT91SAM9263 processor initialization | 290 | * AT91SAM9263 processor initialization |
299 | * -------------------------------------------------------------------- */ | 291 | * -------------------------------------------------------------------- */ |
@@ -306,6 +298,7 @@ static void __init at91sam9263_map_io(void) | |||
306 | 298 | ||
307 | static void __init at91sam9263_ioremap_registers(void) | 299 | static void __init at91sam9263_ioremap_registers(void) |
308 | { | 300 | { |
301 | at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC); | ||
309 | at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); | 302 | at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); |
310 | at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); | 303 | at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); |
311 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); | 304 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); |
@@ -314,7 +307,6 @@ static void __init at91sam9263_ioremap_registers(void) | |||
314 | static void __init at91sam9263_initialize(void) | 307 | static void __init at91sam9263_initialize(void) |
315 | { | 308 | { |
316 | at91_arch_reset = at91sam9_alt_reset; | 309 | at91_arch_reset = at91sam9_alt_reset; |
317 | pm_power_off = at91sam9263_poweroff; | ||
318 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); | 310 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
319 | 311 | ||
320 | /* Register GPIO subsystem */ | 312 | /* Register GPIO subsystem */ |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index ce3233f22ed1..7fdf964f6c3a 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
16 | 15 | ||
17 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
@@ -20,7 +19,6 @@ | |||
20 | #include <mach/at91sam9g45.h> | 19 | #include <mach/at91sam9g45.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | #include <mach/cpu.h> | 22 | #include <mach/cpu.h> |
25 | 23 | ||
26 | #include "soc.h" | 24 | #include "soc.h" |
@@ -323,12 +321,6 @@ static void at91sam9g45_reset(void) | |||
323 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | 321 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
324 | } | 322 | } |
325 | 323 | ||
326 | static void at91sam9g45_poweroff(void) | ||
327 | { | ||
328 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
329 | } | ||
330 | |||
331 | |||
332 | /* -------------------------------------------------------------------- | 324 | /* -------------------------------------------------------------------- |
333 | * AT91SAM9G45 processor initialization | 325 | * AT91SAM9G45 processor initialization |
334 | * -------------------------------------------------------------------- */ | 326 | * -------------------------------------------------------------------- */ |
@@ -341,6 +333,7 @@ static void __init at91sam9g45_map_io(void) | |||
341 | 333 | ||
342 | static void __init at91sam9g45_ioremap_registers(void) | 334 | static void __init at91sam9g45_ioremap_registers(void) |
343 | { | 335 | { |
336 | at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC); | ||
344 | at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); | 337 | at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); |
345 | at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); | 338 | at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); |
346 | } | 339 | } |
@@ -348,7 +341,6 @@ static void __init at91sam9g45_ioremap_registers(void) | |||
348 | static void __init at91sam9g45_initialize(void) | 341 | static void __init at91sam9g45_initialize(void) |
349 | { | 342 | { |
350 | at91_arch_reset = at91sam9g45_reset; | 343 | at91_arch_reset = at91sam9g45_reset; |
351 | pm_power_off = at91sam9g45_poweroff; | ||
352 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); | 344 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); |
353 | 345 | ||
354 | /* Register GPIO subsystem */ | 346 | /* Register GPIO subsystem */ |
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 1bcccd705296..6856badc518b 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/pm.h> | ||
14 | 13 | ||
15 | #include <asm/irq.h> | 14 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 15 | #include <asm/mach/arch.h> |
@@ -20,7 +19,6 @@ | |||
20 | #include <mach/at91sam9rl.h> | 19 | #include <mach/at91sam9rl.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | 22 | ||
25 | #include "soc.h" | 23 | #include "soc.h" |
26 | #include "generic.h" | 24 | #include "generic.h" |
@@ -264,12 +262,6 @@ static struct at91_gpio_bank at91sam9rl_gpio[] = { | |||
264 | } | 262 | } |
265 | }; | 263 | }; |
266 | 264 | ||
267 | static void at91sam9rl_poweroff(void) | ||
268 | { | ||
269 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
270 | } | ||
271 | |||
272 | |||
273 | /* -------------------------------------------------------------------- | 265 | /* -------------------------------------------------------------------- |
274 | * AT91SAM9RL processor initialization | 266 | * AT91SAM9RL processor initialization |
275 | * -------------------------------------------------------------------- */ | 267 | * -------------------------------------------------------------------- */ |
@@ -293,6 +285,7 @@ static void __init at91sam9rl_map_io(void) | |||
293 | 285 | ||
294 | static void __init at91sam9rl_ioremap_registers(void) | 286 | static void __init at91sam9rl_ioremap_registers(void) |
295 | { | 287 | { |
288 | at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC); | ||
296 | at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); | 289 | at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); |
297 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); | 290 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); |
298 | } | 291 | } |
@@ -300,7 +293,6 @@ static void __init at91sam9rl_ioremap_registers(void) | |||
300 | static void __init at91sam9rl_initialize(void) | 293 | static void __init at91sam9rl_initialize(void) |
301 | { | 294 | { |
302 | at91_arch_reset = at91sam9_alt_reset; | 295 | at91_arch_reset = at91sam9_alt_reset; |
303 | pm_power_off = at91sam9rl_poweroff; | ||
304 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); | 296 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); |
305 | 297 | ||
306 | /* Register GPIO subsystem */ | 298 | /* Register GPIO subsystem */ |
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 89d44c037291..6eb0c9359866 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c | |||
@@ -251,7 +251,7 @@ static void __init ek_board_init(void) | |||
251 | /* LEDs */ | 251 | /* LEDs */ |
252 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); | 252 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); |
253 | /* shutdown controller, wakeup button (5 msec low) */ | 253 | /* shutdown controller, wakeup button (5 msec low) */ |
254 | at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW | 254 | at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW |
255 | | AT91_SHDW_RTTWKEN); | 255 | | AT91_SHDW_RTTWKEN); |
256 | } | 256 | } |
257 | 257 | ||
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c index 6f893cf4d336..dbc2609fa7fe 100644 --- a/arch/arm/mach-at91/board-usb-a926x.c +++ b/arch/arm/mach-at91/board-usb-a926x.c | |||
@@ -344,7 +344,7 @@ static void __init ek_board_init(void) | |||
344 | /* I2C */ | 344 | /* I2C */ |
345 | at91_add_device_i2c(NULL, 0); | 345 | at91_add_device_i2c(NULL, 0); |
346 | /* shutdown controller, wakeup button (5 msec low) */ | 346 | /* shutdown controller, wakeup button (5 msec low) */ |
347 | at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | 347 | at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) |
348 | | AT91_SHDW_WKMODE0_LOW | 348 | | AT91_SHDW_WKMODE0_LOW |
349 | | AT91_SHDW_RTTWKEN); | 349 | | AT91_SHDW_RTTWKEN); |
350 | } | 350 | } |
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 8196ecc37ed2..bc1776406f42 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -60,6 +60,9 @@ extern void at91_irq_resume(void); | |||
60 | /* reset */ | 60 | /* reset */ |
61 | extern void at91sam9_alt_reset(void); | 61 | extern void at91sam9_alt_reset(void); |
62 | 62 | ||
63 | /* shutdown */ | ||
64 | extern void at91_ioremap_shdwc(u32 base_addr); | ||
65 | |||
63 | /* GPIO */ | 66 | /* GPIO */ |
64 | #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ | 67 | #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ |
65 | #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ | 68 | #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ |
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h index c4ce07e8a8fa..1d4fe822c77a 100644 --- a/arch/arm/mach-at91/include/mach/at91_shdwc.h +++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h | |||
@@ -16,11 +16,21 @@ | |||
16 | #ifndef AT91_SHDWC_H | 16 | #ifndef AT91_SHDWC_H |
17 | #define AT91_SHDWC_H | 17 | #define AT91_SHDWC_H |
18 | 18 | ||
19 | #define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ | 19 | #ifndef __ASSEMBLY__ |
20 | extern void __iomem *at91_shdwc_base; | ||
21 | |||
22 | #define at91_shdwc_read(field) \ | ||
23 | __raw_readl(at91_shdwc_base + field) | ||
24 | |||
25 | #define at91_shdwc_write(field, value) \ | ||
26 | __raw_writel(value, at91_shdwc_base + field); | ||
27 | #endif | ||
28 | |||
29 | #define AT91_SHDW_CR 0x00 /* Shut Down Control Register */ | ||
20 | #define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ | 30 | #define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ |
21 | #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ | 31 | #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ |
22 | 32 | ||
23 | #define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ | 33 | #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */ |
24 | #define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ | 34 | #define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ |
25 | #define AT91_SHDW_WKMODE0_NONE 0 | 35 | #define AT91_SHDW_WKMODE0_NONE 0 |
26 | #define AT91_SHDW_WKMODE0_HIGH 1 | 36 | #define AT91_SHDW_WKMODE0_HIGH 1 |
@@ -30,7 +40,7 @@ | |||
30 | #define AT91_SHDW_CPTWK0_(x) ((x) << 4) | 40 | #define AT91_SHDW_CPTWK0_(x) ((x) << 4) |
31 | #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ | 41 | #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ |
32 | 42 | ||
33 | #define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ | 43 | #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */ |
34 | #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ | 44 | #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ |
35 | #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ | 45 | #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ |
36 | #define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ | 46 | #define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ |
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h index cd19f0500cd2..5ac468c219af 100644 --- a/arch/arm/mach-at91/include/mach/at91cap9.h +++ b/arch/arm/mach-at91/include/mach/at91cap9.h | |||
@@ -86,7 +86,6 @@ | |||
86 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | 86 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) |
87 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 87 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
88 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 88 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
89 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
90 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | 89 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) |
91 | #define AT91_GPBR (cpu_is_at91cap9_revB() ? \ | 90 | #define AT91_GPBR (cpu_is_at91cap9_revB() ? \ |
92 | (0xfffffd50 - AT91_BASE_SYS) : \ | 91 | (0xfffffd50 - AT91_BASE_SYS) : \ |
@@ -99,6 +98,7 @@ | |||
99 | #define AT91CAP9_BASE_PIOB 0xfffff400 | 98 | #define AT91CAP9_BASE_PIOB 0xfffff400 |
100 | #define AT91CAP9_BASE_PIOC 0xfffff600 | 99 | #define AT91CAP9_BASE_PIOC 0xfffff600 |
101 | #define AT91CAP9_BASE_PIOD 0xfffff800 | 100 | #define AT91CAP9_BASE_PIOD 0xfffff800 |
101 | #define AT91CAP9_BASE_SHDWC 0xfffffd10 | ||
102 | #define AT91CAP9_BASE_RTT 0xfffffd20 | 102 | #define AT91CAP9_BASE_RTT 0xfffffd20 |
103 | #define AT91CAP9_BASE_PIT 0xfffffd30 | 103 | #define AT91CAP9_BASE_PIT 0xfffffd30 |
104 | 104 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h index f964cfaca379..e3c819ab3435 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h | |||
@@ -86,7 +86,6 @@ | |||
86 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | 86 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) |
87 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 87 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
88 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 88 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
89 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
90 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | 89 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) |
91 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) | 90 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) |
92 | 91 | ||
@@ -95,6 +94,7 @@ | |||
95 | #define AT91SAM9260_BASE_PIOA 0xfffff400 | 94 | #define AT91SAM9260_BASE_PIOA 0xfffff400 |
96 | #define AT91SAM9260_BASE_PIOB 0xfffff600 | 95 | #define AT91SAM9260_BASE_PIOB 0xfffff600 |
97 | #define AT91SAM9260_BASE_PIOC 0xfffff800 | 96 | #define AT91SAM9260_BASE_PIOC 0xfffff800 |
97 | #define AT91SAM9260_BASE_SHDWC 0xfffffd10 | ||
98 | #define AT91SAM9260_BASE_RTT 0xfffffd20 | 98 | #define AT91SAM9260_BASE_RTT 0xfffffd20 |
99 | #define AT91SAM9260_BASE_PIT 0xfffffd30 | 99 | #define AT91SAM9260_BASE_PIT 0xfffffd30 |
100 | 100 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h index 1ea2d6b06c81..f9b516368f96 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261.h | |||
@@ -71,7 +71,6 @@ | |||
71 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | 71 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) |
72 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 72 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
73 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 73 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
74 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
75 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | 74 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) |
76 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) | 75 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) |
77 | 76 | ||
@@ -79,6 +78,7 @@ | |||
79 | #define AT91SAM9261_BASE_PIOA 0xfffff400 | 78 | #define AT91SAM9261_BASE_PIOA 0xfffff400 |
80 | #define AT91SAM9261_BASE_PIOB 0xfffff600 | 79 | #define AT91SAM9261_BASE_PIOB 0xfffff600 |
81 | #define AT91SAM9261_BASE_PIOC 0xfffff800 | 80 | #define AT91SAM9261_BASE_PIOC 0xfffff800 |
81 | #define AT91SAM9261_BASE_SHDWC 0xfffffd10 | ||
82 | #define AT91SAM9261_BASE_RTT 0xfffffd20 | 82 | #define AT91SAM9261_BASE_RTT 0xfffffd20 |
83 | #define AT91SAM9261_BASE_PIT 0xfffffd30 | 83 | #define AT91SAM9261_BASE_PIT 0xfffffd30 |
84 | 84 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h index a62a3a8d9087..28d52d588e90 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9263.h +++ b/arch/arm/mach-at91/include/mach/at91sam9263.h | |||
@@ -81,7 +81,6 @@ | |||
81 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | 81 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) |
82 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 82 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
83 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 83 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
84 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
85 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | 84 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) |
86 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 85 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
87 | 86 | ||
@@ -94,6 +93,7 @@ | |||
94 | #define AT91SAM9263_BASE_PIOC 0xfffff600 | 93 | #define AT91SAM9263_BASE_PIOC 0xfffff600 |
95 | #define AT91SAM9263_BASE_PIOD 0xfffff800 | 94 | #define AT91SAM9263_BASE_PIOD 0xfffff800 |
96 | #define AT91SAM9263_BASE_PIOE 0xfffffa00 | 95 | #define AT91SAM9263_BASE_PIOE 0xfffffa00 |
96 | #define AT91SAM9263_BASE_SHDWC 0xfffffd10 | ||
97 | #define AT91SAM9263_BASE_RTT0 0xfffffd20 | 97 | #define AT91SAM9263_BASE_RTT0 0xfffffd20 |
98 | #define AT91SAM9263_BASE_PIT 0xfffffd30 | 98 | #define AT91SAM9263_BASE_PIT 0xfffffd30 |
99 | #define AT91SAM9263_BASE_RTT1 0xfffffd50 | 99 | #define AT91SAM9263_BASE_RTT1 0xfffffd50 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index ac051d427e6b..5f3453ef5866 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h | |||
@@ -93,7 +93,6 @@ | |||
93 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | 93 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) |
94 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 94 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
95 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 95 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
96 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
97 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | 96 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) |
98 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 97 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
99 | #define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) | 98 | #define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) |
@@ -106,6 +105,7 @@ | |||
106 | #define AT91SAM9G45_BASE_PIOC 0xfffff600 | 105 | #define AT91SAM9G45_BASE_PIOC 0xfffff600 |
107 | #define AT91SAM9G45_BASE_PIOD 0xfffff800 | 106 | #define AT91SAM9G45_BASE_PIOD 0xfffff800 |
108 | #define AT91SAM9G45_BASE_PIOE 0xfffffa00 | 107 | #define AT91SAM9G45_BASE_PIOE 0xfffffa00 |
108 | #define AT91SAM9G45_BASE_SHDWC 0xfffffd10 | ||
109 | #define AT91SAM9G45_BASE_RTT 0xfffffd20 | 109 | #define AT91SAM9G45_BASE_RTT 0xfffffd20 |
110 | #define AT91SAM9G45_BASE_PIT 0xfffffd30 | 110 | #define AT91SAM9G45_BASE_PIT 0xfffffd30 |
111 | 111 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index c945d4d5de3f..6f3a4eeb7394 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h | |||
@@ -75,7 +75,6 @@ | |||
75 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | 75 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) |
76 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 76 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
77 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 77 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
78 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
79 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | 78 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) |
80 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) | 79 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) |
81 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 80 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
@@ -88,6 +87,7 @@ | |||
88 | #define AT91SAM9RL_BASE_PIOB 0xfffff600 | 87 | #define AT91SAM9RL_BASE_PIOB 0xfffff600 |
89 | #define AT91SAM9RL_BASE_PIOC 0xfffff800 | 88 | #define AT91SAM9RL_BASE_PIOC 0xfffff800 |
90 | #define AT91SAM9RL_BASE_PIOD 0xfffffa00 | 89 | #define AT91SAM9RL_BASE_PIOD 0xfffffa00 |
90 | #define AT91SAM9RL_BASE_SHDWC 0xfffffd10 | ||
91 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 | 91 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 |
92 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 | 92 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 |
93 | 93 | ||
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 7046158109d7..3a5b7b4279e7 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -34,7 +34,7 @@ | |||
34 | /* | 34 | /* |
35 | * Show the reason for the previous system reset. | 35 | * Show the reason for the previous system reset. |
36 | */ | 36 | */ |
37 | #if defined(AT91_SHDWC) | 37 | #if defined(AT91_RSTC) |
38 | 38 | ||
39 | #include <mach/at91_rstc.h> | 39 | #include <mach/at91_rstc.h> |
40 | #include <mach/at91_shdwc.h> | 40 | #include <mach/at91_shdwc.h> |
@@ -58,8 +58,11 @@ static void __init show_reset_status(void) | |||
58 | char *reason, *r2 = reset; | 58 | char *reason, *r2 = reset; |
59 | u32 reset_type, wake_type; | 59 | u32 reset_type, wake_type; |
60 | 60 | ||
61 | if (!at91_shdwc_base) | ||
62 | return; | ||
63 | |||
61 | reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; | 64 | reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; |
62 | wake_type = at91_sys_read(AT91_SHDW_SR); | 65 | wake_type = at91_shdwc_read(AT91_SHDW_SR); |
63 | 66 | ||
64 | switch (reset_type) { | 67 | switch (reset_type) { |
65 | case AT91_RSTC_RSTTYP_GENERAL: | 68 | case AT91_RSTC_RSTTYP_GENERAL: |
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 63b3ac2595b7..053c36993154 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c | |||
@@ -8,6 +8,7 @@ | |||
8 | #include <linux/module.h> | 8 | #include <linux/module.h> |
9 | #include <linux/io.h> | 9 | #include <linux/io.h> |
10 | #include <linux/mm.h> | 10 | #include <linux/mm.h> |
11 | #include <linux/pm.h> | ||
11 | 12 | ||
12 | #include <asm/mach/map.h> | 13 | #include <asm/mach/map.h> |
13 | 14 | ||
@@ -15,6 +16,7 @@ | |||
15 | #include <mach/cpu.h> | 16 | #include <mach/cpu.h> |
16 | #include <mach/at91_dbgu.h> | 17 | #include <mach/at91_dbgu.h> |
17 | #include <mach/at91_pmc.h> | 18 | #include <mach/at91_pmc.h> |
19 | #include <mach/at91_shdwc.h> | ||
18 | 20 | ||
19 | #include "soc.h" | 21 | #include "soc.h" |
20 | #include "generic.h" | 22 | #include "generic.h" |
@@ -285,6 +287,21 @@ void __init at91_map_io(void) | |||
285 | at91_boot_soc.map_io(); | 287 | at91_boot_soc.map_io(); |
286 | } | 288 | } |
287 | 289 | ||
290 | void __iomem *at91_shdwc_base = NULL; | ||
291 | |||
292 | static void at91sam9_poweroff(void) | ||
293 | { | ||
294 | at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
295 | } | ||
296 | |||
297 | void __init at91_ioremap_shdwc(u32 base_addr) | ||
298 | { | ||
299 | at91_shdwc_base = ioremap(base_addr, 16); | ||
300 | if (!at91_shdwc_base) | ||
301 | panic("Impossible to ioremap at91_shdwc_base\n"); | ||
302 | pm_power_off = at91sam9_poweroff; | ||
303 | } | ||
304 | |||
288 | void __init at91_initialize(unsigned long main_clock) | 305 | void __init at91_initialize(unsigned long main_clock) |
289 | { | 306 | { |
290 | at91_boot_soc.ioremap_registers(); | 307 | at91_boot_soc.ioremap_registers(); |