diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-28 15:34:33 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-28 15:34:33 -0400 |
commit | 09893ee84591b0417a9186a7e7cf1503ccf99ac2 (patch) | |
tree | da8b044ad157b82203df04ae48cb60f4737cc390 /arch/arm/mach-at91 | |
parent | 4bb2d1009f671815870e8f78e826e4f9071392a7 (diff) | |
parent | 7d1206bc2859c6e9f46e35ae697c138e7d7858a7 (diff) |
Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: More device tree support updates" from Olof Johansson:
"This branch contains a number of updates for device tree support on
several ARM platforms, in particular:
* AT91 continues the device tree conversion adding support for a
number of on-chip drivers and other functionality
* ux500 adds probing of some of the core SoC blocks through device
tree
* Initial device tree support for ST SPEAr600 platforms
* kirkwood continues the conversion to device-tree probing"
Manually merge arch/arm/mach-ux500/Kconfig due to MACH_U8500 rename, and
drivers/usb/gadget/at91_udc.c due to header file include cleanups.
Also do an "evil merge" for the MACH_U8500 config option rename that the
affected RMI4 touchscreen driver in staging. It's called MACH_MOP500
now, and it was missed during previous merges.
* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
ARM: SPEAr600: Add device-tree support to SPEAr600 boards
ARM: ux500: Provide local timer support for Device Tree
ARM: ux500: Enable PL022 SSP Controller in Device Tree
ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree
ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree
ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree
ARM: ux500: db8500: list most devices in the snowball device tree
ARM: ux500: split dts file for snowball into generic part
ARM: ux500: combine the board init functions for DT boot
ARM: ux500: Initial Device Tree support for Snowball
ARM: ux500: CONFIG: Enable Device Tree support for future endeavours
ARM: kirkwood: use devicetree for rtc-mv
ARM: kirkwood: rtc-mv devicetree bindings
ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0
ARM: kirkwood: fdt: facilitate new boards during fdt migration
ARM: kirkwood: fdt: absorb kirkwood_init()
ARM: kirkwood: fdt: use mrvl ticker symbol
ARM: orion: wdt: use resource vice direct access
ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data.
ARM: orion: spi: remove enable_clock_fix which is not used
...
Diffstat (limited to 'arch/arm/mach-at91')
30 files changed, 252 insertions, 115 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index e55cdcbd81fb..45db05d8d94c 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -20,9 +20,11 @@ config HAVE_AT91_USART5 | |||
20 | 20 | ||
21 | config AT91_SAM9_ALT_RESET | 21 | config AT91_SAM9_ALT_RESET |
22 | bool | 22 | bool |
23 | default !ARCH_AT91X40 | ||
23 | 24 | ||
24 | config AT91_SAM9G45_RESET | 25 | config AT91_SAM9G45_RESET |
25 | bool | 26 | bool |
27 | default !ARCH_AT91X40 | ||
26 | 28 | ||
27 | menu "Atmel AT91 System-on-Chip" | 29 | menu "Atmel AT91 System-on-Chip" |
28 | 30 | ||
@@ -45,7 +47,6 @@ config ARCH_AT91SAM9260 | |||
45 | select HAVE_AT91_USART4 | 47 | select HAVE_AT91_USART4 |
46 | select HAVE_AT91_USART5 | 48 | select HAVE_AT91_USART5 |
47 | select HAVE_NET_MACB | 49 | select HAVE_NET_MACB |
48 | select AT91_SAM9_ALT_RESET | ||
49 | 50 | ||
50 | config ARCH_AT91SAM9261 | 51 | config ARCH_AT91SAM9261 |
51 | bool "AT91SAM9261" | 52 | bool "AT91SAM9261" |
@@ -53,7 +54,6 @@ config ARCH_AT91SAM9261 | |||
53 | select GENERIC_CLOCKEVENTS | 54 | select GENERIC_CLOCKEVENTS |
54 | select HAVE_FB_ATMEL | 55 | select HAVE_FB_ATMEL |
55 | select HAVE_AT91_DBGU0 | 56 | select HAVE_AT91_DBGU0 |
56 | select AT91_SAM9_ALT_RESET | ||
57 | 57 | ||
58 | config ARCH_AT91SAM9G10 | 58 | config ARCH_AT91SAM9G10 |
59 | bool "AT91SAM9G10" | 59 | bool "AT91SAM9G10" |
@@ -61,7 +61,6 @@ config ARCH_AT91SAM9G10 | |||
61 | select GENERIC_CLOCKEVENTS | 61 | select GENERIC_CLOCKEVENTS |
62 | select HAVE_AT91_DBGU0 | 62 | select HAVE_AT91_DBGU0 |
63 | select HAVE_FB_ATMEL | 63 | select HAVE_FB_ATMEL |
64 | select AT91_SAM9_ALT_RESET | ||
65 | 64 | ||
66 | config ARCH_AT91SAM9263 | 65 | config ARCH_AT91SAM9263 |
67 | bool "AT91SAM9263" | 66 | bool "AT91SAM9263" |
@@ -70,7 +69,6 @@ config ARCH_AT91SAM9263 | |||
70 | select HAVE_FB_ATMEL | 69 | select HAVE_FB_ATMEL |
71 | select HAVE_NET_MACB | 70 | select HAVE_NET_MACB |
72 | select HAVE_AT91_DBGU1 | 71 | select HAVE_AT91_DBGU1 |
73 | select AT91_SAM9_ALT_RESET | ||
74 | 72 | ||
75 | config ARCH_AT91SAM9RL | 73 | config ARCH_AT91SAM9RL |
76 | bool "AT91SAM9RL" | 74 | bool "AT91SAM9RL" |
@@ -79,7 +77,6 @@ config ARCH_AT91SAM9RL | |||
79 | select HAVE_AT91_USART3 | 77 | select HAVE_AT91_USART3 |
80 | select HAVE_FB_ATMEL | 78 | select HAVE_FB_ATMEL |
81 | select HAVE_AT91_DBGU0 | 79 | select HAVE_AT91_DBGU0 |
82 | select AT91_SAM9_ALT_RESET | ||
83 | 80 | ||
84 | config ARCH_AT91SAM9G20 | 81 | config ARCH_AT91SAM9G20 |
85 | bool "AT91SAM9G20" | 82 | bool "AT91SAM9G20" |
@@ -90,7 +87,6 @@ config ARCH_AT91SAM9G20 | |||
90 | select HAVE_AT91_USART4 | 87 | select HAVE_AT91_USART4 |
91 | select HAVE_AT91_USART5 | 88 | select HAVE_AT91_USART5 |
92 | select HAVE_NET_MACB | 89 | select HAVE_NET_MACB |
93 | select AT91_SAM9_ALT_RESET | ||
94 | 90 | ||
95 | config ARCH_AT91SAM9G45 | 91 | config ARCH_AT91SAM9G45 |
96 | bool "AT91SAM9G45" | 92 | bool "AT91SAM9G45" |
@@ -100,7 +96,6 @@ config ARCH_AT91SAM9G45 | |||
100 | select HAVE_FB_ATMEL | 96 | select HAVE_FB_ATMEL |
101 | select HAVE_NET_MACB | 97 | select HAVE_NET_MACB |
102 | select HAVE_AT91_DBGU1 | 98 | select HAVE_AT91_DBGU1 |
103 | select AT91_SAM9G45_RESET | ||
104 | 99 | ||
105 | config ARCH_AT91SAM9X5 | 100 | config ARCH_AT91SAM9X5 |
106 | bool "AT91SAM9x5 family" | 101 | bool "AT91SAM9x5 family" |
@@ -109,7 +104,6 @@ config ARCH_AT91SAM9X5 | |||
109 | select HAVE_FB_ATMEL | 104 | select HAVE_FB_ATMEL |
110 | select HAVE_NET_MACB | 105 | select HAVE_NET_MACB |
111 | select HAVE_AT91_DBGU0 | 106 | select HAVE_AT91_DBGU0 |
112 | select AT91_SAM9G45_RESET | ||
113 | 107 | ||
114 | config ARCH_AT91X40 | 108 | config ARCH_AT91X40 |
115 | bool "AT91x40" | 109 | bool "AT91x40" |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 14b5a9c9a514..d1e5750a6a04 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -216,6 +216,7 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
216 | CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk), | 216 | CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk), |
217 | CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk), | 217 | CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk), |
218 | CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk), | 218 | CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk), |
219 | CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk), | ||
219 | /* fake hclk clock */ | 220 | /* fake hclk clock */ |
220 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 221 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
221 | CLKDEV_CON_ID("pioA", &pioA_clk), | 222 | CLKDEV_CON_ID("pioA", &pioA_clk), |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 0014573dfe17..df3bceacc86c 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -232,6 +232,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
232 | /* more tc lookup table for DT entries */ | 232 | /* more tc lookup table for DT entries */ |
233 | CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb0_clk), | 233 | CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb0_clk), |
234 | CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk), | 234 | CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk), |
235 | CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk), | ||
236 | CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk), | ||
235 | /* fake hclk clock */ | 237 | /* fake hclk clock */ |
236 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), | 238 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), |
237 | CLKDEV_CON_ID("pioA", &pioA_clk), | 239 | CLKDEV_CON_ID("pioA", &pioA_clk), |
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index a34d96afa746..b6831eeb7b76 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c | |||
@@ -131,7 +131,7 @@ static struct clk dma1_clk = { | |||
131 | .type = CLK_TYPE_PERIPHERAL, | 131 | .type = CLK_TYPE_PERIPHERAL, |
132 | }; | 132 | }; |
133 | static struct clk uhphs_clk = { | 133 | static struct clk uhphs_clk = { |
134 | .name = "uhphs_clk", | 134 | .name = "uhphs", |
135 | .pmc_mask = 1 << AT91SAM9X5_ID_UHPHS, | 135 | .pmc_mask = 1 << AT91SAM9X5_ID_UHPHS, |
136 | .type = CLK_TYPE_PERIPHERAL, | 136 | .type = CLK_TYPE_PERIPHERAL, |
137 | }; | 137 | }; |
@@ -230,6 +230,9 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
230 | /* additional fake clock for macb_hclk */ | 230 | /* additional fake clock for macb_hclk */ |
231 | CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk), | 231 | CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk), |
232 | CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk), | 232 | CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk), |
233 | CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk), | ||
234 | CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk), | ||
235 | CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk), | ||
233 | }; | 236 | }; |
234 | 237 | ||
235 | /* | 238 | /* |
@@ -299,14 +302,8 @@ static void __init at91sam9x5_map_io(void) | |||
299 | at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); | 302 | at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); |
300 | } | 303 | } |
301 | 304 | ||
302 | static void __init at91sam9x5_ioremap_registers(void) | ||
303 | { | ||
304 | at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512); | ||
305 | } | ||
306 | |||
307 | void __init at91sam9x5_initialize(void) | 305 | void __init at91sam9x5_initialize(void) |
308 | { | 306 | { |
309 | arm_pm_restart = at91sam9g45_restart; | ||
310 | at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); | 307 | at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); |
311 | 308 | ||
312 | /* Register GPIO subsystem (using DT) */ | 309 | /* Register GPIO subsystem (using DT) */ |
@@ -314,11 +311,6 @@ void __init at91sam9x5_initialize(void) | |||
314 | } | 311 | } |
315 | 312 | ||
316 | /* -------------------------------------------------------------------- | 313 | /* -------------------------------------------------------------------- |
317 | * AT91SAM9x5 devices (temporary before modification of code) | ||
318 | * -------------------------------------------------------------------- */ | ||
319 | void __init at91_add_device_nand(struct atmel_nand_data *data) {} | ||
320 | |||
321 | /* -------------------------------------------------------------------- | ||
322 | * Interrupt initialization | 314 | * Interrupt initialization |
323 | * -------------------------------------------------------------------- */ | 315 | * -------------------------------------------------------------------- */ |
324 | /* | 316 | /* |
@@ -362,7 +354,6 @@ static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
362 | struct at91_init_soc __initdata at91sam9x5_soc = { | 354 | struct at91_init_soc __initdata at91sam9x5_soc = { |
363 | .map_io = at91sam9x5_map_io, | 355 | .map_io = at91sam9x5_map_io, |
364 | .default_irq_priority = at91sam9x5_default_irq_priority, | 356 | .default_irq_priority = at91sam9x5_default_irq_priority, |
365 | .ioremap_registers = at91sam9x5_ioremap_registers, | ||
366 | .register_clocks = at91sam9x5_register_clocks, | 357 | .register_clocks = at91sam9x5_register_clocks, |
367 | .init = at91sam9x5_initialize, | 358 | .init = at91sam9x5_initialize, |
368 | }; | 359 | }; |
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index 3bb40694b02d..161efbaa1029 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c | |||
@@ -138,6 +138,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = { | |||
138 | .rdy_pin = AT91_PIN_PC13, | 138 | .rdy_pin = AT91_PIN_PC13, |
139 | .enable_pin = AT91_PIN_PC14, | 139 | .enable_pin = AT91_PIN_PC14, |
140 | .bus_width_16 = 0, | 140 | .bus_width_16 = 0, |
141 | .ecc_mode = NAND_ECC_SOFT, | ||
141 | .parts = afeb9260_nand_partition, | 142 | .parts = afeb9260_nand_partition, |
142 | .num_parts = ARRAY_SIZE(afeb9260_nand_partition), | 143 | .num_parts = ARRAY_SIZE(afeb9260_nand_partition), |
143 | .det_pin = -EINVAL, | 144 | .det_pin = -EINVAL, |
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index 8510e9e54988..c6d44ee0c77e 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c | |||
@@ -140,6 +140,7 @@ static struct atmel_nand_data __initdata cam60_nand_data = { | |||
140 | .det_pin = -EINVAL, | 140 | .det_pin = -EINVAL, |
141 | .rdy_pin = AT91_PIN_PA9, | 141 | .rdy_pin = AT91_PIN_PA9, |
142 | .enable_pin = AT91_PIN_PA7, | 142 | .enable_pin = AT91_PIN_PA7, |
143 | .ecc_mode = NAND_ECC_SOFT, | ||
143 | .parts = cam60_nand_partition, | 144 | .parts = cam60_nand_partition, |
144 | .num_parts = ARRAY_SIZE(cam60_nand_partition), | 145 | .num_parts = ARRAY_SIZE(cam60_nand_partition), |
145 | }; | 146 | }; |
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index 989e1c5a9ca0..5f3680e7c883 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c | |||
@@ -117,6 +117,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = { | |||
117 | .enable_pin = AT91_PIN_PC14, | 117 | .enable_pin = AT91_PIN_PC14, |
118 | .bus_width_16 = 0, | 118 | .bus_width_16 = 0, |
119 | .det_pin = -EINVAL, | 119 | .det_pin = -EINVAL, |
120 | .ecc_mode = NAND_ECC_SOFT, | ||
120 | }; | 121 | }; |
121 | 122 | ||
122 | #ifdef CONFIG_MACH_CPU9260 | 123 | #ifdef CONFIG_MACH_CPU9260 |
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c index 583b72472ad9..c18d4d307801 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt.c | |||
@@ -19,10 +19,7 @@ | |||
19 | #include <linux/of_irq.h> | 19 | #include <linux/of_irq.h> |
20 | #include <linux/of_platform.h> | 20 | #include <linux/of_platform.h> |
21 | 21 | ||
22 | #include <mach/hardware.h> | ||
23 | #include <mach/board.h> | 22 | #include <mach/board.h> |
24 | #include <mach/system_rev.h> | ||
25 | #include <mach/at91sam9_smc.h> | ||
26 | 23 | ||
27 | #include <asm/setup.h> | 24 | #include <asm/setup.h> |
28 | #include <asm/irq.h> | 25 | #include <asm/irq.h> |
@@ -30,58 +27,9 @@ | |||
30 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
31 | #include <asm/mach/irq.h> | 28 | #include <asm/mach/irq.h> |
32 | 29 | ||
33 | #include "sam9_smc.h" | ||
34 | #include "generic.h" | 30 | #include "generic.h" |
35 | 31 | ||
36 | 32 | ||
37 | static void __init ek_init_early(void) | ||
38 | { | ||
39 | /* Initialize processor: 12.000 MHz crystal */ | ||
40 | at91_initialize(12000000); | ||
41 | } | ||
42 | |||
43 | /* det_pin is not connected */ | ||
44 | static struct atmel_nand_data __initdata ek_nand_data = { | ||
45 | .ale = 21, | ||
46 | .cle = 22, | ||
47 | .det_pin = -EINVAL, | ||
48 | .rdy_pin = AT91_PIN_PC8, | ||
49 | .enable_pin = AT91_PIN_PC14, | ||
50 | }; | ||
51 | |||
52 | static struct sam9_smc_config __initdata ek_nand_smc_config = { | ||
53 | .ncs_read_setup = 0, | ||
54 | .nrd_setup = 2, | ||
55 | .ncs_write_setup = 0, | ||
56 | .nwe_setup = 2, | ||
57 | |||
58 | .ncs_read_pulse = 4, | ||
59 | .nrd_pulse = 4, | ||
60 | .ncs_write_pulse = 4, | ||
61 | .nwe_pulse = 4, | ||
62 | |||
63 | .read_cycle = 7, | ||
64 | .write_cycle = 7, | ||
65 | |||
66 | .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, | ||
67 | .tdf_cycles = 3, | ||
68 | }; | ||
69 | |||
70 | static void __init ek_add_device_nand(void) | ||
71 | { | ||
72 | ek_nand_data.bus_width_16 = board_have_nand_16bit(); | ||
73 | /* setup bus-width (8 or 16) */ | ||
74 | if (ek_nand_data.bus_width_16) | ||
75 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | ||
76 | else | ||
77 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | ||
78 | |||
79 | /* configure chip-select 3 (NAND) */ | ||
80 | sam9_smc_configure(0, 3, &ek_nand_smc_config); | ||
81 | |||
82 | at91_add_device_nand(&ek_nand_data); | ||
83 | } | ||
84 | |||
85 | static const struct of_device_id irq_of_match[] __initconst = { | 33 | static const struct of_device_id irq_of_match[] __initconst = { |
86 | 34 | ||
87 | { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init }, | 35 | { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init }, |
@@ -98,9 +46,6 @@ static void __init at91_dt_init_irq(void) | |||
98 | static void __init at91_dt_device_init(void) | 46 | static void __init at91_dt_device_init(void) |
99 | { | 47 | { |
100 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); | 48 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
101 | |||
102 | /* NAND */ | ||
103 | ek_add_device_nand(); | ||
104 | } | 49 | } |
105 | 50 | ||
106 | static const char *at91_dt_board_compat[] __initdata = { | 51 | static const char *at91_dt_board_compat[] __initdata = { |
@@ -114,7 +59,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") | |||
114 | /* Maintainer: Atmel */ | 59 | /* Maintainer: Atmel */ |
115 | .timer = &at91sam926x_timer, | 60 | .timer = &at91sam926x_timer, |
116 | .map_io = at91_map_io, | 61 | .map_io = at91_map_io, |
117 | .init_early = ek_init_early, | 62 | .init_early = at91_dt_initialize, |
118 | .init_irq = at91_dt_init_irq, | 63 | .init_irq = at91_dt_init_irq, |
119 | .init_machine = at91_dt_device_init, | 64 | .init_machine = at91_dt_device_init, |
120 | .dt_compat = at91_dt_board_compat, | 65 | .dt_compat = at91_dt_board_compat, |
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index bb9914582013..59b92aab9bcf 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c | |||
@@ -108,6 +108,7 @@ static struct atmel_nand_data __initdata kb9202_nand_data = { | |||
108 | .det_pin = -EINVAL, | 108 | .det_pin = -EINVAL, |
109 | .rdy_pin = AT91_PIN_PC29, | 109 | .rdy_pin = AT91_PIN_PC29, |
110 | .enable_pin = AT91_PIN_PC28, | 110 | .enable_pin = AT91_PIN_PC28, |
111 | .ecc_mode = NAND_ECC_SOFT, | ||
111 | .parts = kb9202_nand_partition, | 112 | .parts = kb9202_nand_partition, |
112 | .num_parts = ARRAY_SIZE(kb9202_nand_partition), | 113 | .num_parts = ARRAY_SIZE(kb9202_nand_partition), |
113 | }; | 114 | }; |
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index 3f8617c0e04e..57d5f6a4726a 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c | |||
@@ -190,6 +190,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = { | |||
190 | .rdy_pin = AT91_PIN_PB19, | 190 | .rdy_pin = AT91_PIN_PB19, |
191 | .rdy_pin_active_low = 1, | 191 | .rdy_pin_active_low = 1, |
192 | .enable_pin = AT91_PIN_PD15, | 192 | .enable_pin = AT91_PIN_PD15, |
193 | .ecc_mode = NAND_ECC_SOFT, | ||
193 | .parts = neocore926_nand_partition, | 194 | .parts = neocore926_nand_partition, |
194 | .num_parts = ARRAY_SIZE(neocore926_nand_partition), | 195 | .num_parts = ARRAY_SIZE(neocore926_nand_partition), |
195 | .det_pin = -EINVAL, | 196 | .det_pin = -EINVAL, |
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index e029d220cb84..b6ed5ed7081a 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c | |||
@@ -138,6 +138,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
138 | .det_pin = -EINVAL, | 138 | .det_pin = -EINVAL, |
139 | .rdy_pin = AT91_PIN_PC13, | 139 | .rdy_pin = AT91_PIN_PC13, |
140 | .enable_pin = AT91_PIN_PC14, | 140 | .enable_pin = AT91_PIN_PC14, |
141 | .ecc_mode = NAND_ECC_SOFT, | ||
142 | .on_flash_bbt = 1, | ||
141 | .parts = ek_nand_partition, | 143 | .parts = ek_nand_partition, |
142 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 144 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
143 | }; | 145 | }; |
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index 9083df04e7ed..01332aa538b2 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c | |||
@@ -150,6 +150,8 @@ static struct atmel_nand_data __initdata dk_nand_data = { | |||
150 | .det_pin = AT91_PIN_PB1, | 150 | .det_pin = AT91_PIN_PB1, |
151 | .rdy_pin = AT91_PIN_PC2, | 151 | .rdy_pin = AT91_PIN_PC2, |
152 | .enable_pin = -EINVAL, | 152 | .enable_pin = -EINVAL, |
153 | .ecc_mode = NAND_ECC_SOFT, | ||
154 | .on_flash_bbt = 1, | ||
153 | .parts = dk_nand_partition, | 155 | .parts = dk_nand_partition, |
154 | .num_parts = ARRAY_SIZE(dk_nand_partition), | 156 | .num_parts = ARRAY_SIZE(dk_nand_partition), |
155 | }; | 157 | }; |
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index 84bce587735f..e8b116b6cba6 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c | |||
@@ -139,6 +139,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
139 | .det_pin = -EINVAL, | 139 | .det_pin = -EINVAL, |
140 | .rdy_pin = AT91_PIN_PC13, | 140 | .rdy_pin = AT91_PIN_PC13, |
141 | .enable_pin = AT91_PIN_PC14, | 141 | .enable_pin = AT91_PIN_PC14, |
142 | .ecc_mode = NAND_ECC_SOFT, | ||
142 | .parts = ek_nand_partition, | 143 | .parts = ek_nand_partition, |
143 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 144 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
144 | }; | 145 | }; |
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index be8233bcabdc..d5aec55b0eb4 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c | |||
@@ -181,6 +181,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
181 | .det_pin = -EINVAL, | 181 | .det_pin = -EINVAL, |
182 | .rdy_pin = AT91_PIN_PC13, | 182 | .rdy_pin = AT91_PIN_PC13, |
183 | .enable_pin = AT91_PIN_PC14, | 183 | .enable_pin = AT91_PIN_PC14, |
184 | .ecc_mode = NAND_ECC_SOFT, | ||
185 | .on_flash_bbt = 1, | ||
184 | .parts = ek_nand_partition, | 186 | .parts = ek_nand_partition, |
185 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 187 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
186 | }; | 188 | }; |
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 40895072a1a7..c3f994462864 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c | |||
@@ -187,6 +187,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
187 | .det_pin = -EINVAL, | 187 | .det_pin = -EINVAL, |
188 | .rdy_pin = AT91_PIN_PC15, | 188 | .rdy_pin = AT91_PIN_PC15, |
189 | .enable_pin = AT91_PIN_PC14, | 189 | .enable_pin = AT91_PIN_PC14, |
190 | .ecc_mode = NAND_ECC_SOFT, | ||
191 | .on_flash_bbt = 1, | ||
190 | .parts = ek_nand_partition, | 192 | .parts = ek_nand_partition, |
191 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 193 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
192 | }; | 194 | }; |
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 29f66052fe63..66f0ddf4b2ae 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c | |||
@@ -187,6 +187,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
187 | .det_pin = -EINVAL, | 187 | .det_pin = -EINVAL, |
188 | .rdy_pin = AT91_PIN_PA22, | 188 | .rdy_pin = AT91_PIN_PA22, |
189 | .enable_pin = AT91_PIN_PD15, | 189 | .enable_pin = AT91_PIN_PD15, |
190 | .ecc_mode = NAND_ECC_SOFT, | ||
191 | .on_flash_bbt = 1, | ||
190 | .parts = ek_nand_partition, | 192 | .parts = ek_nand_partition, |
191 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 193 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
192 | }; | 194 | }; |
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 843d6286c6f4..8923ec9f5831 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c | |||
@@ -166,6 +166,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
166 | .rdy_pin = AT91_PIN_PC13, | 166 | .rdy_pin = AT91_PIN_PC13, |
167 | .enable_pin = AT91_PIN_PC14, | 167 | .enable_pin = AT91_PIN_PC14, |
168 | .det_pin = -EINVAL, | 168 | .det_pin = -EINVAL, |
169 | .ecc_mode = NAND_ECC_SOFT, | ||
170 | .on_flash_bbt = 1, | ||
169 | .parts = ek_nand_partition, | 171 | .parts = ek_nand_partition, |
170 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 172 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
171 | }; | 173 | }; |
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 57497e2b8878..e1bea73e6b30 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
@@ -148,6 +148,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
148 | .rdy_pin = AT91_PIN_PC8, | 148 | .rdy_pin = AT91_PIN_PC8, |
149 | .enable_pin = AT91_PIN_PC14, | 149 | .enable_pin = AT91_PIN_PC14, |
150 | .det_pin = -EINVAL, | 150 | .det_pin = -EINVAL, |
151 | .ecc_mode = NAND_ECC_SOFT, | ||
152 | .on_flash_bbt = 1, | ||
151 | .parts = ek_nand_partition, | 153 | .parts = ek_nand_partition, |
152 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 154 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
153 | }; | 155 | }; |
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index c1366d0032bf..b109ce2ba864 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c | |||
@@ -94,6 +94,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
94 | .det_pin = -EINVAL, | 94 | .det_pin = -EINVAL, |
95 | .rdy_pin = AT91_PIN_PD17, | 95 | .rdy_pin = AT91_PIN_PD17, |
96 | .enable_pin = AT91_PIN_PB6, | 96 | .enable_pin = AT91_PIN_PB6, |
97 | .ecc_mode = NAND_ECC_SOFT, | ||
98 | .on_flash_bbt = 1, | ||
97 | .parts = ek_nand_partition, | 99 | .parts = ek_nand_partition, |
98 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 100 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
99 | }; | 101 | }; |
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index 3c2e3fcc310c..ebc9d01ce742 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c | |||
@@ -110,6 +110,7 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = { | |||
110 | .bus_width_16 = 0, | 110 | .bus_width_16 = 0, |
111 | .enable_pin = -EINVAL, | 111 | .enable_pin = -EINVAL, |
112 | .det_pin = -EINVAL, | 112 | .det_pin = -EINVAL, |
113 | .ecc_mode = NAND_ECC_SOFT, | ||
113 | }; | 114 | }; |
114 | 115 | ||
115 | static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { | 116 | static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { |
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index 72eb3b4d9ab6..7640049410a0 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c | |||
@@ -86,6 +86,7 @@ static struct atmel_nand_data __initdata nand_data = { | |||
86 | .enable_pin = AT91_PIN_PC14, | 86 | .enable_pin = AT91_PIN_PC14, |
87 | .bus_width_16 = 0, | 87 | .bus_width_16 = 0, |
88 | .det_pin = -EINVAL, | 88 | .det_pin = -EINVAL, |
89 | .ecc_mode = NAND_ECC_SOFT, | ||
89 | }; | 90 | }; |
90 | 91 | ||
91 | static struct sam9_smc_config __initdata nand_smc_config = { | 92 | static struct sam9_smc_config __initdata nand_smc_config = { |
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c index 26c36fc2d1e5..b7483a3d0980 100644 --- a/arch/arm/mach-at91/board-usb-a926x.c +++ b/arch/arm/mach-at91/board-usb-a926x.c | |||
@@ -198,6 +198,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
198 | .det_pin = -EINVAL, | 198 | .det_pin = -EINVAL, |
199 | .rdy_pin = AT91_PIN_PA22, | 199 | .rdy_pin = AT91_PIN_PA22, |
200 | .enable_pin = AT91_PIN_PD15, | 200 | .enable_pin = AT91_PIN_PD15, |
201 | .ecc_mode = NAND_ECC_SOFT, | ||
202 | .on_flash_bbt = 1, | ||
201 | .parts = ek_nand_partition, | 203 | .parts = ek_nand_partition, |
202 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 204 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
203 | }; | 205 | }; |
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index 52f460768f71..38dd279d30b2 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c | |||
@@ -182,6 +182,7 @@ static struct atmel_nand_data __initdata yl9200_nand_data = { | |||
182 | .det_pin = -EINVAL, | 182 | .det_pin = -EINVAL, |
183 | .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ | 183 | .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ |
184 | .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ | 184 | .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ |
185 | .ecc_mode = NAND_ECC_SOFT, | ||
185 | .parts = yl9200_nand_partition, | 186 | .parts = yl9200_nand_partition, |
186 | .num_parts = ARRAY_SIZE(yl9200_nand_partition), | 187 | .num_parts = ARRAY_SIZE(yl9200_nand_partition), |
187 | }; | 188 | }; |
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index be51ca7f694d..a0f4d7424cdc 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | #include <linux/of_address.h> | ||
26 | 27 | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | #include <mach/at91_pmc.h> | 29 | #include <mach/at91_pmc.h> |
@@ -671,16 +672,12 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock) | |||
671 | uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); | 672 | uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); |
672 | } | 673 | } |
673 | 674 | ||
674 | int __init at91_clock_init(unsigned long main_clock) | 675 | static int __init at91_pmc_init(unsigned long main_clock) |
675 | { | 676 | { |
676 | unsigned tmp, freq, mckr; | 677 | unsigned tmp, freq, mckr; |
677 | int i; | 678 | int i; |
678 | int pll_overclock = false; | 679 | int pll_overclock = false; |
679 | 680 | ||
680 | at91_pmc_base = ioremap(AT91_PMC, 256); | ||
681 | if (!at91_pmc_base) | ||
682 | panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC); | ||
683 | |||
684 | /* | 681 | /* |
685 | * When the bootloader initialized the main oscillator correctly, | 682 | * When the bootloader initialized the main oscillator correctly, |
686 | * there's no problem using the cycle counter. But if it didn't, | 683 | * there's no problem using the cycle counter. But if it didn't, |
@@ -802,6 +799,55 @@ int __init at91_clock_init(unsigned long main_clock) | |||
802 | return 0; | 799 | return 0; |
803 | } | 800 | } |
804 | 801 | ||
802 | #if defined(CONFIG_OF) | ||
803 | static struct of_device_id pmc_ids[] = { | ||
804 | { .compatible = "atmel,at91rm9200-pmc" }, | ||
805 | { /*sentinel*/ } | ||
806 | }; | ||
807 | |||
808 | static struct of_device_id osc_ids[] = { | ||
809 | { .compatible = "atmel,osc" }, | ||
810 | { /*sentinel*/ } | ||
811 | }; | ||
812 | |||
813 | int __init at91_dt_clock_init(void) | ||
814 | { | ||
815 | struct device_node *np; | ||
816 | u32 main_clock = 0; | ||
817 | |||
818 | np = of_find_matching_node(NULL, pmc_ids); | ||
819 | if (!np) | ||
820 | panic("unable to find compatible pmc node in dtb\n"); | ||
821 | |||
822 | at91_pmc_base = of_iomap(np, 0); | ||
823 | if (!at91_pmc_base) | ||
824 | panic("unable to map pmc cpu registers\n"); | ||
825 | |||
826 | of_node_put(np); | ||
827 | |||
828 | /* retrieve the freqency of fixed clocks from device tree */ | ||
829 | np = of_find_matching_node(NULL, osc_ids); | ||
830 | if (np) { | ||
831 | u32 rate; | ||
832 | if (!of_property_read_u32(np, "clock-frequency", &rate)) | ||
833 | main_clock = rate; | ||
834 | } | ||
835 | |||
836 | of_node_put(np); | ||
837 | |||
838 | return at91_pmc_init(main_clock); | ||
839 | } | ||
840 | #endif | ||
841 | |||
842 | int __init at91_clock_init(unsigned long main_clock) | ||
843 | { | ||
844 | at91_pmc_base = ioremap(AT91_PMC, 256); | ||
845 | if (!at91_pmc_base) | ||
846 | panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC); | ||
847 | |||
848 | return at91_pmc_init(main_clock); | ||
849 | } | ||
850 | |||
805 | /* | 851 | /* |
806 | * Several unused clocks may be active. Turn them off. | 852 | * Several unused clocks may be active. Turn them off. |
807 | */ | 853 | */ |
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 459f01a4a546..dd9b346c451d 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -20,6 +20,7 @@ extern void __init at91_init_sram(int bank, unsigned long base, | |||
20 | extern void __init at91rm9200_set_type(int type); | 20 | extern void __init at91rm9200_set_type(int type); |
21 | extern void __init at91_initialize(unsigned long main_clock); | 21 | extern void __init at91_initialize(unsigned long main_clock); |
22 | extern void __init at91x40_initialize(unsigned long main_clock); | 22 | extern void __init at91x40_initialize(unsigned long main_clock); |
23 | extern void __init at91_dt_initialize(void); | ||
23 | 24 | ||
24 | /* Interrupts */ | 25 | /* Interrupts */ |
25 | extern void __init at91_init_irq_default(void); | 26 | extern void __init at91_init_irq_default(void); |
@@ -52,6 +53,7 @@ extern void __init at91sam9rl_set_console_clock(int id); | |||
52 | extern void __init at91sam9g45_set_console_clock(int id); | 53 | extern void __init at91sam9g45_set_console_clock(int id); |
53 | #ifdef CONFIG_AT91_PMC_UNIT | 54 | #ifdef CONFIG_AT91_PMC_UNIT |
54 | extern int __init at91_clock_init(unsigned long main_clock); | 55 | extern int __init at91_clock_init(unsigned long main_clock); |
56 | extern int __init at91_dt_clock_init(void); | ||
55 | #else | 57 | #else |
56 | static int inline at91_clock_init(unsigned long main_clock) { return 0; } | 58 | static int inline at91_clock_init(unsigned long main_clock) { return 0; } |
57 | #endif | 59 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h index 1d4fe822c77a..60478ea8bd46 100644 --- a/arch/arm/mach-at91/include/mach/at91_shdwc.h +++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h | |||
@@ -36,9 +36,11 @@ extern void __iomem *at91_shdwc_base; | |||
36 | #define AT91_SHDW_WKMODE0_HIGH 1 | 36 | #define AT91_SHDW_WKMODE0_HIGH 1 |
37 | #define AT91_SHDW_WKMODE0_LOW 2 | 37 | #define AT91_SHDW_WKMODE0_LOW 2 |
38 | #define AT91_SHDW_WKMODE0_ANYLEVEL 3 | 38 | #define AT91_SHDW_WKMODE0_ANYLEVEL 3 |
39 | #define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */ | 39 | #define AT91_SHDW_CPTWK0_MAX 0xf /* Maximum Counter On Wake Up 0 */ |
40 | #define AT91_SHDW_CPTWK0 (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */ | ||
40 | #define AT91_SHDW_CPTWK0_(x) ((x) << 4) | 41 | #define AT91_SHDW_CPTWK0_(x) ((x) << 4) |
41 | #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ | 42 | #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ |
43 | #define AT91_SHDW_RTCWKEN (1 << 17) /* Real Time Clock Wake-up Enable */ | ||
42 | 44 | ||
43 | #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */ | 45 | #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */ |
44 | #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ | 46 | #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h index a297a77d88e2..88e43d534cdf 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9x5.h +++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h | |||
@@ -55,11 +55,6 @@ | |||
55 | #define AT91SAM9X5_BASE_USART2 0xf8024000 | 55 | #define AT91SAM9X5_BASE_USART2 0xf8024000 |
56 | 56 | ||
57 | /* | 57 | /* |
58 | * System Peripherals | ||
59 | */ | ||
60 | #define AT91SAM9X5_BASE_DDRSDRC0 0xffffe800 | ||
61 | |||
62 | /* | ||
63 | * Base addresses for early serial code (uncompress.h) | 58 | * Base addresses for early serial code (uncompress.h) |
64 | */ | 59 | */ |
65 | #define AT91_DBGU AT91_BASE_DBGU0 | 60 | #define AT91_DBGU AT91_BASE_DBGU0 |
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index dc8d6d4f17cf..544a5d5ce416 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <sound/atmel-ac97c.h> | 41 | #include <sound/atmel-ac97c.h> |
42 | #include <linux/serial.h> | 42 | #include <linux/serial.h> |
43 | #include <linux/platform_data/macb.h> | 43 | #include <linux/platform_data/macb.h> |
44 | #include <linux/platform_data/atmel.h> | ||
44 | 45 | ||
45 | /* USB Device */ | 46 | /* USB Device */ |
46 | struct at91_udc_data { | 47 | struct at91_udc_data { |
@@ -98,20 +99,6 @@ extern void __init at91_add_device_usbh(struct at91_usbh_data *data); | |||
98 | extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); | 99 | extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); |
99 | extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); | 100 | extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); |
100 | 101 | ||
101 | /* NAND / SmartMedia */ | ||
102 | struct atmel_nand_data { | ||
103 | int enable_pin; /* chip enable */ | ||
104 | int det_pin; /* card detect */ | ||
105 | int rdy_pin; /* ready/busy */ | ||
106 | u8 rdy_pin_active_low; /* rdy_pin value is inverted */ | ||
107 | u8 ale; /* address line number connected to ALE */ | ||
108 | u8 cle; /* address line number connected to CLE */ | ||
109 | u8 bus_width_16; /* buswidth is 16 bit */ | ||
110 | u8 correction_cap; /* PMECC correction capability */ | ||
111 | u16 sector_size; /* Sector size for PMECC */ | ||
112 | struct mtd_partition *parts; | ||
113 | unsigned int num_parts; | ||
114 | }; | ||
115 | extern void __init at91_add_device_nand(struct atmel_nand_data *data); | 102 | extern void __init at91_add_device_nand(struct atmel_nand_data *data); |
116 | 103 | ||
117 | /* I2C*/ | 104 | /* I2C*/ |
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 6c9d5e69ac28..f630250c6b87 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -197,19 +197,6 @@ extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, | |||
197 | extern u32 at91_slow_clock_sz; | 197 | extern u32 at91_slow_clock_sz; |
198 | #endif | 198 | #endif |
199 | 199 | ||
200 | void __iomem *at91_ramc_base[2]; | ||
201 | |||
202 | void __init at91_ioremap_ramc(int id, u32 addr, u32 size) | ||
203 | { | ||
204 | if (id < 0 || id > 1) { | ||
205 | pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id); | ||
206 | BUG(); | ||
207 | } | ||
208 | at91_ramc_base[id] = ioremap(addr, size); | ||
209 | if (!at91_ramc_base[id]) | ||
210 | panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr); | ||
211 | } | ||
212 | |||
213 | static int at91_pm_enter(suspend_state_t state) | 200 | static int at91_pm_enter(suspend_state_t state) |
214 | { | 201 | { |
215 | at91_gpio_suspend(); | 202 | at91_gpio_suspend(); |
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 372396c2ecb6..1083739e3065 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <linux/io.h> | 9 | #include <linux/io.h> |
10 | #include <linux/mm.h> | 10 | #include <linux/mm.h> |
11 | #include <linux/pm.h> | 11 | #include <linux/pm.h> |
12 | #include <linux/of_address.h> | ||
12 | 13 | ||
13 | #include <asm/mach/map.h> | 14 | #include <asm/mach/map.h> |
14 | 15 | ||
@@ -51,6 +52,19 @@ void __init at91_init_interrupts(unsigned int *priority) | |||
51 | at91_gpio_irq_setup(); | 52 | at91_gpio_irq_setup(); |
52 | } | 53 | } |
53 | 54 | ||
55 | void __iomem *at91_ramc_base[2]; | ||
56 | |||
57 | void __init at91_ioremap_ramc(int id, u32 addr, u32 size) | ||
58 | { | ||
59 | if (id < 0 || id > 1) { | ||
60 | pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id); | ||
61 | BUG(); | ||
62 | } | ||
63 | at91_ramc_base[id] = ioremap(addr, size); | ||
64 | if (!at91_ramc_base[id]) | ||
65 | panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr); | ||
66 | } | ||
67 | |||
54 | static struct map_desc sram_desc[2] __initdata; | 68 | static struct map_desc sram_desc[2] __initdata; |
55 | 69 | ||
56 | void __init at91_init_sram(int bank, unsigned long base, unsigned int length) | 70 | void __init at91_init_sram(int bank, unsigned long base, unsigned int length) |
@@ -285,6 +299,150 @@ void __init at91_ioremap_matrix(u32 base_addr) | |||
285 | panic("Impossible to ioremap at91_matrix_base\n"); | 299 | panic("Impossible to ioremap at91_matrix_base\n"); |
286 | } | 300 | } |
287 | 301 | ||
302 | #if defined(CONFIG_OF) | ||
303 | static struct of_device_id rstc_ids[] = { | ||
304 | { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart }, | ||
305 | { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart }, | ||
306 | { /*sentinel*/ } | ||
307 | }; | ||
308 | |||
309 | static void at91_dt_rstc(void) | ||
310 | { | ||
311 | struct device_node *np; | ||
312 | const struct of_device_id *of_id; | ||
313 | |||
314 | np = of_find_matching_node(NULL, rstc_ids); | ||
315 | if (!np) | ||
316 | panic("unable to find compatible rstc node in dtb\n"); | ||
317 | |||
318 | at91_rstc_base = of_iomap(np, 0); | ||
319 | if (!at91_rstc_base) | ||
320 | panic("unable to map rstc cpu registers\n"); | ||
321 | |||
322 | of_id = of_match_node(rstc_ids, np); | ||
323 | if (!of_id) | ||
324 | panic("AT91: rtsc no restart function availlable\n"); | ||
325 | |||
326 | arm_pm_restart = of_id->data; | ||
327 | |||
328 | of_node_put(np); | ||
329 | } | ||
330 | |||
331 | static struct of_device_id ramc_ids[] = { | ||
332 | { .compatible = "atmel,at91sam9260-sdramc" }, | ||
333 | { .compatible = "atmel,at91sam9g45-ddramc" }, | ||
334 | { /*sentinel*/ } | ||
335 | }; | ||
336 | |||
337 | static void at91_dt_ramc(void) | ||
338 | { | ||
339 | struct device_node *np; | ||
340 | |||
341 | np = of_find_matching_node(NULL, ramc_ids); | ||
342 | if (!np) | ||
343 | panic("unable to find compatible ram conroller node in dtb\n"); | ||
344 | |||
345 | at91_ramc_base[0] = of_iomap(np, 0); | ||
346 | if (!at91_ramc_base[0]) | ||
347 | panic("unable to map ramc[0] cpu registers\n"); | ||
348 | /* the controller may have 2 banks */ | ||
349 | at91_ramc_base[1] = of_iomap(np, 1); | ||
350 | |||
351 | of_node_put(np); | ||
352 | } | ||
353 | |||
354 | static struct of_device_id shdwc_ids[] = { | ||
355 | { .compatible = "atmel,at91sam9260-shdwc", }, | ||
356 | { .compatible = "atmel,at91sam9rl-shdwc", }, | ||
357 | { .compatible = "atmel,at91sam9x5-shdwc", }, | ||
358 | { /*sentinel*/ } | ||
359 | }; | ||
360 | |||
361 | static const char *shdwc_wakeup_modes[] = { | ||
362 | [AT91_SHDW_WKMODE0_NONE] = "none", | ||
363 | [AT91_SHDW_WKMODE0_HIGH] = "high", | ||
364 | [AT91_SHDW_WKMODE0_LOW] = "low", | ||
365 | [AT91_SHDW_WKMODE0_ANYLEVEL] = "any", | ||
366 | }; | ||
367 | |||
368 | const int at91_dtget_shdwc_wakeup_mode(struct device_node *np) | ||
369 | { | ||
370 | const char *pm; | ||
371 | int err, i; | ||
372 | |||
373 | err = of_property_read_string(np, "atmel,wakeup-mode", &pm); | ||
374 | if (err < 0) | ||
375 | return AT91_SHDW_WKMODE0_ANYLEVEL; | ||
376 | |||
377 | for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++) | ||
378 | if (!strcasecmp(pm, shdwc_wakeup_modes[i])) | ||
379 | return i; | ||
380 | |||
381 | return -ENODEV; | ||
382 | } | ||
383 | |||
384 | static void at91_dt_shdwc(void) | ||
385 | { | ||
386 | struct device_node *np; | ||
387 | int wakeup_mode; | ||
388 | u32 reg; | ||
389 | u32 mode = 0; | ||
390 | |||
391 | np = of_find_matching_node(NULL, shdwc_ids); | ||
392 | if (!np) { | ||
393 | pr_debug("AT91: unable to find compatible shutdown (shdwc) conroller node in dtb\n"); | ||
394 | return; | ||
395 | } | ||
396 | |||
397 | at91_shdwc_base = of_iomap(np, 0); | ||
398 | if (!at91_shdwc_base) | ||
399 | panic("AT91: unable to map shdwc cpu registers\n"); | ||
400 | |||
401 | wakeup_mode = at91_dtget_shdwc_wakeup_mode(np); | ||
402 | if (wakeup_mode < 0) { | ||
403 | pr_warn("AT91: shdwc unknown wakeup mode\n"); | ||
404 | goto end; | ||
405 | } | ||
406 | |||
407 | if (!of_property_read_u32(np, "atmel,wakeup-counter", ®)) { | ||
408 | if (reg > AT91_SHDW_CPTWK0_MAX) { | ||
409 | pr_warn("AT91: shdwc wakeup conter 0x%x > 0x%x reduce it to 0x%x\n", | ||
410 | reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX); | ||
411 | reg = AT91_SHDW_CPTWK0_MAX; | ||
412 | } | ||
413 | mode |= AT91_SHDW_CPTWK0_(reg); | ||
414 | } | ||
415 | |||
416 | if (of_property_read_bool(np, "atmel,wakeup-rtc-timer")) | ||
417 | mode |= AT91_SHDW_RTCWKEN; | ||
418 | |||
419 | if (of_property_read_bool(np, "atmel,wakeup-rtt-timer")) | ||
420 | mode |= AT91_SHDW_RTTWKEN; | ||
421 | |||
422 | at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode); | ||
423 | |||
424 | end: | ||
425 | pm_power_off = at91sam9_poweroff; | ||
426 | |||
427 | of_node_put(np); | ||
428 | } | ||
429 | |||
430 | void __init at91_dt_initialize(void) | ||
431 | { | ||
432 | at91_dt_rstc(); | ||
433 | at91_dt_ramc(); | ||
434 | at91_dt_shdwc(); | ||
435 | |||
436 | /* Init clock subsystem */ | ||
437 | at91_dt_clock_init(); | ||
438 | |||
439 | /* Register the processor-specific clocks */ | ||
440 | at91_boot_soc.register_clocks(); | ||
441 | |||
442 | at91_boot_soc.init(); | ||
443 | } | ||
444 | #endif | ||
445 | |||
288 | void __init at91_initialize(unsigned long main_clock) | 446 | void __init at91_initialize(unsigned long main_clock) |
289 | { | 447 | { |
290 | at91_boot_soc.ioremap_registers(); | 448 | at91_boot_soc.ioremap_registers(); |