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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-11-01 13:43:31 -0400
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-11-28 09:50:39 -0500
commit13079a733313c00ca92fc6716383dd126caa7276 (patch)
tree8052b91a3f42d8f92f9547ca87cf1555d2f834c9 /arch/arm/mach-at91
parentc1c30a29df7e47310caa979dc48f715ae478de5f (diff)
ARM: at91: make DBGU soc independent
we will select now the DBGU used by the soc at Kconfig level For the DEBUG_LL and early_printk this will allow to select which DBGU to use this will also allow to select them when multiple SOC are enabled Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r--arch/arm/mach-at91/Kconfig24
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c4
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c4
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c4
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c4
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c4
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c4
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c4
-rw-r--r--arch/arm/mach-at91/include/mach/at91_dbgu.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91rm9200.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h2
-rw-r--r--arch/arm/mach-at91/include/mach/debug-macro.S10
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h6
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h6
-rw-r--r--arch/arm/mach-at91/setup.c7
20 files changed, 64 insertions, 33 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index d111c3e99249..4f991f295284 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,6 +3,12 @@ if ARCH_AT91
3config HAVE_AT91_DATAFLASH_CARD 3config HAVE_AT91_DATAFLASH_CARD
4 bool 4 bool
5 5
6config HAVE_AT91_DBGU0
7 bool
8
9config HAVE_AT91_DBGU1
10 bool
11
6config HAVE_AT91_USART3 12config HAVE_AT91_USART3
7 bool 13 bool
8 14
@@ -21,12 +27,14 @@ config ARCH_AT91RM9200
21 bool "AT91RM9200" 27 bool "AT91RM9200"
22 select CPU_ARM920T 28 select CPU_ARM920T
23 select GENERIC_CLOCKEVENTS 29 select GENERIC_CLOCKEVENTS
30 select HAVE_AT91_DBGU0
24 select HAVE_AT91_USART3 31 select HAVE_AT91_USART3
25 32
26config ARCH_AT91SAM9260 33config ARCH_AT91SAM9260
27 bool "AT91SAM9260 or AT91SAM9XE" 34 bool "AT91SAM9260 or AT91SAM9XE"
28 select CPU_ARM926T 35 select CPU_ARM926T
29 select GENERIC_CLOCKEVENTS 36 select GENERIC_CLOCKEVENTS
37 select HAVE_AT91_DBGU0
30 select HAVE_AT91_USART3 38 select HAVE_AT91_USART3
31 select HAVE_AT91_USART4 39 select HAVE_AT91_USART4
32 select HAVE_AT91_USART5 40 select HAVE_AT91_USART5
@@ -37,11 +45,13 @@ config ARCH_AT91SAM9261
37 select CPU_ARM926T 45 select CPU_ARM926T
38 select GENERIC_CLOCKEVENTS 46 select GENERIC_CLOCKEVENTS
39 select HAVE_FB_ATMEL 47 select HAVE_FB_ATMEL
48 select HAVE_AT91_DBGU0
40 49
41config ARCH_AT91SAM9G10 50config ARCH_AT91SAM9G10
42 bool "AT91SAM9G10" 51 bool "AT91SAM9G10"
43 select CPU_ARM926T 52 select CPU_ARM926T
44 select GENERIC_CLOCKEVENTS 53 select GENERIC_CLOCKEVENTS
54 select HAVE_AT91_DBGU0
45 select HAVE_FB_ATMEL 55 select HAVE_FB_ATMEL
46 56
47config ARCH_AT91SAM9263 57config ARCH_AT91SAM9263
@@ -50,6 +60,7 @@ config ARCH_AT91SAM9263
50 select GENERIC_CLOCKEVENTS 60 select GENERIC_CLOCKEVENTS
51 select HAVE_FB_ATMEL 61 select HAVE_FB_ATMEL
52 select HAVE_NET_MACB 62 select HAVE_NET_MACB
63 select HAVE_AT91_DBGU1
53 64
54config ARCH_AT91SAM9RL 65config ARCH_AT91SAM9RL
55 bool "AT91SAM9RL" 66 bool "AT91SAM9RL"
@@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL
57 select GENERIC_CLOCKEVENTS 68 select GENERIC_CLOCKEVENTS
58 select HAVE_AT91_USART3 69 select HAVE_AT91_USART3
59 select HAVE_FB_ATMEL 70 select HAVE_FB_ATMEL
71 select HAVE_AT91_DBGU0
60 72
61config ARCH_AT91SAM9G20 73config ARCH_AT91SAM9G20
62 bool "AT91SAM9G20" 74 bool "AT91SAM9G20"
63 select CPU_ARM926T 75 select CPU_ARM926T
64 select GENERIC_CLOCKEVENTS 76 select GENERIC_CLOCKEVENTS
77 select HAVE_AT91_DBGU0
65 select HAVE_AT91_USART3 78 select HAVE_AT91_USART3
66 select HAVE_AT91_USART4 79 select HAVE_AT91_USART4
67 select HAVE_AT91_USART5 80 select HAVE_AT91_USART5
@@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45
74 select HAVE_AT91_USART3 87 select HAVE_AT91_USART3
75 select HAVE_FB_ATMEL 88 select HAVE_FB_ATMEL
76 select HAVE_NET_MACB 89 select HAVE_NET_MACB
90 select HAVE_AT91_DBGU1
77 91
78config ARCH_AT91CAP9 92config ARCH_AT91CAP9
79 bool "AT91CAP9" 93 bool "AT91CAP9"
@@ -81,6 +95,7 @@ config ARCH_AT91CAP9
81 select GENERIC_CLOCKEVENTS 95 select GENERIC_CLOCKEVENTS
82 select HAVE_FB_ATMEL 96 select HAVE_FB_ATMEL
83 select HAVE_NET_MACB 97 select HAVE_NET_MACB
98 select HAVE_AT91_DBGU1
84 99
85config ARCH_AT91X40 100config ARCH_AT91X40
86 bool "AT91x40" 101 bool "AT91x40"
@@ -510,8 +525,13 @@ config AT91_TIMER_HZ
510choice 525choice
511 prompt "Select a UART for early kernel messages" 526 prompt "Select a UART for early kernel messages"
512 527
513config AT91_EARLY_DBGU 528config AT91_EARLY_DBGU0
514 bool "DBGU" 529 bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
530 depends on HAVE_AT91_DBGU0
531
532config AT91_EARLY_DBGU1
533 bool "DBGU on 9263, 9g45 and cap9"
534 depends on HAVE_AT91_DBGU1
515 535
516config AT91_EARLY_USART0 536config AT91_EARLY_USART0
517 bool "USART0" 537 bool "USART0"
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 019dac047b91..19975cfb00cd 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -1030,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1030#if defined(CONFIG_SERIAL_ATMEL) 1030#if defined(CONFIG_SERIAL_ATMEL)
1031static struct resource dbgu_resources[] = { 1031static struct resource dbgu_resources[] = {
1032 [0] = { 1032 [0] = {
1033 .start = AT91_BASE_SYS + AT91_DBGU, 1033 .start = AT91CAP9_BASE_DBGU,
1034 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1034 .end = AT91CAP9_BASE_DBGU + SZ_512 - 1,
1035 .flags = IORESOURCE_MEM, 1035 .flags = IORESOURCE_MEM,
1036 }, 1036 },
1037 [1] = { 1037 [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 66591fa53e05..1007ba8ec131 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -877,8 +877,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
877#if defined(CONFIG_SERIAL_ATMEL) 877#if defined(CONFIG_SERIAL_ATMEL)
878static struct resource dbgu_resources[] = { 878static struct resource dbgu_resources[] = {
879 [0] = { 879 [0] = {
880 .start = AT91_BASE_SYS + AT91_DBGU, 880 .start = AT91RM9200_BASE_DBGU,
881 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 881 .end = AT91RM9200_BASE_DBGU + SZ_512 - 1,
882 .flags = IORESOURCE_MEM, 882 .flags = IORESOURCE_MEM,
883 }, 883 },
884 [1] = { 884 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 9cdaffa0d6b1..5b424fcc9c8c 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -846,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
846#if defined(CONFIG_SERIAL_ATMEL) 846#if defined(CONFIG_SERIAL_ATMEL)
847static struct resource dbgu_resources[] = { 847static struct resource dbgu_resources[] = {
848 [0] = { 848 [0] = {
849 .start = AT91_BASE_SYS + AT91_DBGU, 849 .start = AT91SAM9260_BASE_DBGU,
850 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 850 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
851 .flags = IORESOURCE_MEM, 851 .flags = IORESOURCE_MEM,
852 }, 852 },
853 [1] = { 853 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index c59e1e9a4f5c..e5cff1d902d0 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -825,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
825#if defined(CONFIG_SERIAL_ATMEL) 825#if defined(CONFIG_SERIAL_ATMEL)
826static struct resource dbgu_resources[] = { 826static struct resource dbgu_resources[] = {
827 [0] = { 827 [0] = {
828 .start = AT91_BASE_SYS + AT91_DBGU, 828 .start = AT91SAM9261_BASE_DBGU,
829 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 829 .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
830 .flags = IORESOURCE_MEM, 830 .flags = IORESOURCE_MEM,
831 }, 831 },
832 [1] = { 832 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index b5f4e2532fdb..20e681c6b404 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -1205,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1205 1205
1206static struct resource dbgu_resources[] = { 1206static struct resource dbgu_resources[] = {
1207 [0] = { 1207 [0] = {
1208 .start = AT91_BASE_SYS + AT91_DBGU, 1208 .start = AT91SAM9263_BASE_DBGU,
1209 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1209 .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1210 .flags = IORESOURCE_MEM, 1210 .flags = IORESOURCE_MEM,
1211 }, 1211 },
1212 [1] = { 1212 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 3b91706e4f7d..153dad0642c6 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1341,8 +1341,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1341#if defined(CONFIG_SERIAL_ATMEL) 1341#if defined(CONFIG_SERIAL_ATMEL)
1342static struct resource dbgu_resources[] = { 1342static struct resource dbgu_resources[] = {
1343 [0] = { 1343 [0] = {
1344 .start = AT91_BASE_SYS + AT91_DBGU, 1344 .start = AT91SAM9G45_BASE_DBGU,
1345 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1345 .end = AT91SAM9G45_BASE_DBGU + SZ_512 - 1,
1346 .flags = IORESOURCE_MEM, 1346 .flags = IORESOURCE_MEM,
1347 }, 1347 },
1348 [1] = { 1348 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index c7961b446dd8..366c1cfd4f77 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -917,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
917#if defined(CONFIG_SERIAL_ATMEL) 917#if defined(CONFIG_SERIAL_ATMEL)
918static struct resource dbgu_resources[] = { 918static struct resource dbgu_resources[] = {
919 [0] = { 919 [0] = {
920 .start = AT91_BASE_SYS + AT91_DBGU, 920 .start = AT91SAM9RL_BASE_DBGU,
921 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 921 .end = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
922 .flags = IORESOURCE_MEM, 922 .flags = IORESOURCE_MEM,
923 }, 923 },
924 [1] = { 924 [1] = {
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
index dbfe455a4c41..2aa0c5e13495 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbgu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h
@@ -19,7 +19,7 @@
19#define dbgu_readl(dbgu, field) \ 19#define dbgu_readl(dbgu, field) \
20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) 20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
21 21
22#ifdef AT91_DBGU 22#if !defined(CONFIG_ARCH_AT91X40)
23#define AT91_DBGU_CR (0x00) /* Control Register */ 23#define AT91_DBGU_CR (0x00) /* Control Register */
24#define AT91_DBGU_MR (0x04) /* Mode Register */ 24#define AT91_DBGU_MR (0x04) /* Mode Register */
25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ 25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 750ba85614ca..bca2b54de73e 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -82,7 +82,6 @@
82#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) 82#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS)
83#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 83#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
84#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
85#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
86#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 85#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
87#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 86#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
88#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 87#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
@@ -93,6 +92,7 @@
93#define AT91CAP9_BASE_ECC 0xffffe200 92#define AT91CAP9_BASE_ECC 0xffffe200
94#define AT91CAP9_BASE_DMA 0xffffec00 93#define AT91CAP9_BASE_DMA 0xffffec00
95#define AT91CAP9_BASE_SMC 0xffffe800 94#define AT91CAP9_BASE_SMC 0xffffe800
95#define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1
96#define AT91CAP9_BASE_PIOA 0xfffff200 96#define AT91CAP9_BASE_PIOA 0xfffff200
97#define AT91CAP9_BASE_PIOB 0xfffff400 97#define AT91CAP9_BASE_PIOB 0xfffff400
98#define AT91CAP9_BASE_PIOC 0xfffff600 98#define AT91CAP9_BASE_PIOC 0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 57409549585f..1f767e28ea50 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -80,12 +80,12 @@
80 * System Peripherals (offset from AT91_BASE_SYS) 80 * System Peripherals (offset from AT91_BASE_SYS)
81 */ 81 */
82#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ 82#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */
83#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */
84#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ 83#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */
85#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ 84#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */
86#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ 85#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */
87#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ 86#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
88 87
88#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */
89#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */ 89#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */
90#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */ 90#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */
91#define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */ 91#define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 05860c5eb548..e360d6665437 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -83,13 +83,13 @@
83#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 83#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
84#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
85#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 85#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
86#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
87#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 86#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
88#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 87#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
89#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 88#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
90 89
91#define AT91SAM9260_BASE_ECC 0xffffe800 90#define AT91SAM9260_BASE_ECC 0xffffe800
92#define AT91SAM9260_BASE_SMC 0xffffec00 91#define AT91SAM9260_BASE_SMC 0xffffec00
92#define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0
93#define AT91SAM9260_BASE_PIOA 0xfffff400 93#define AT91SAM9260_BASE_PIOA 0xfffff400
94#define AT91SAM9260_BASE_PIOB 0xfffff600 94#define AT91SAM9260_BASE_PIOB 0xfffff600
95#define AT91SAM9260_BASE_PIOC 0xfffff800 95#define AT91SAM9260_BASE_PIOC 0xfffff800
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index df2ddfd2d22e..2ccc8a53985b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -68,12 +68,12 @@
68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
69#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 69#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
70#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 70#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
71#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
72#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 71#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
73#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 72#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
74#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 73#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
75 74
76#define AT91SAM9261_BASE_SMC 0xffffec00 75#define AT91SAM9261_BASE_SMC 0xffffec00
76#define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0
77#define AT91SAM9261_BASE_PIOA 0xfffff400 77#define AT91SAM9261_BASE_PIOA 0xfffff400
78#define AT91SAM9261_BASE_PIOB 0xfffff600 78#define AT91SAM9261_BASE_PIOB 0xfffff600
79#define AT91SAM9261_BASE_PIOC 0xfffff800 79#define AT91SAM9261_BASE_PIOC 0xfffff800
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 0eb614eb2fa6..aee137ba5bcf 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -77,7 +77,6 @@
77#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) 77#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS)
78#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) 78#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
79#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) 79#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS)
80#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
81#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 80#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
82#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 81#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
83#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 82#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
@@ -87,6 +86,7 @@
87#define AT91SAM9263_BASE_SMC0 0xffffe400 86#define AT91SAM9263_BASE_SMC0 0xffffe400
88#define AT91SAM9263_BASE_ECC1 0xffffe600 87#define AT91SAM9263_BASE_ECC1 0xffffe600
89#define AT91SAM9263_BASE_SMC1 0xffffea00 88#define AT91SAM9263_BASE_SMC1 0xffffea00
89#define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1
90#define AT91SAM9263_BASE_PIOA 0xfffff200 90#define AT91SAM9263_BASE_PIOA 0xfffff200
91#define AT91SAM9263_BASE_PIOB 0xfffff400 91#define AT91SAM9263_BASE_PIOB 0xfffff400
92#define AT91SAM9263_BASE_PIOC 0xfffff600 92#define AT91SAM9263_BASE_PIOC 0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 65098c323101..211721b790a7 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -89,7 +89,6 @@
89#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) 89#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS)
90#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 90#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
91#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 91#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
92#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
93#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 92#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
94#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 93#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
95#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 94#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
@@ -99,6 +98,7 @@
99#define AT91SAM9G45_BASE_ECC 0xffffe200 98#define AT91SAM9G45_BASE_ECC 0xffffe200
100#define AT91SAM9G45_BASE_DMA 0xffffec00 99#define AT91SAM9G45_BASE_DMA 0xffffec00
101#define AT91SAM9G45_BASE_SMC 0xffffe800 100#define AT91SAM9G45_BASE_SMC 0xffffe800
101#define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1
102#define AT91SAM9G45_BASE_PIOA 0xfffff200 102#define AT91SAM9G45_BASE_PIOA 0xfffff200
103#define AT91SAM9G45_BASE_PIOB 0xfffff400 103#define AT91SAM9G45_BASE_PIOB 0xfffff400
104#define AT91SAM9G45_BASE_PIOC 0xfffff600 104#define AT91SAM9G45_BASE_PIOC 0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 46e136d3ef3f..4f7367a53f04 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -72,7 +72,6 @@
72#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 72#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
73#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 73#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
74#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 74#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
75#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
76#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 75#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
77#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 76#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
78#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) 77#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
@@ -82,6 +81,7 @@
82#define AT91SAM9RL_BASE_DMA 0xffffe600 81#define AT91SAM9RL_BASE_DMA 0xffffe600
83#define AT91SAM9RL_BASE_ECC 0xffffe800 82#define AT91SAM9RL_BASE_ECC 0xffffe800
84#define AT91SAM9RL_BASE_SMC 0xffffec00 83#define AT91SAM9RL_BASE_SMC 0xffffec00
84#define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0
85#define AT91SAM9RL_BASE_PIOA 0xfffff400 85#define AT91SAM9RL_BASE_PIOA 0xfffff400
86#define AT91SAM9RL_BASE_PIOB 0xfffff600 86#define AT91SAM9RL_BASE_PIOB 0xfffff600
87#define AT91SAM9RL_BASE_PIOC 0xfffff800 87#define AT91SAM9RL_BASE_PIOC 0xfffff800
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index 0ed8648c6452..c6bb9e2d9baa 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -14,9 +14,15 @@
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/at91_dbgu.h> 15#include <mach/at91_dbgu.h>
16 16
17#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
18#define AT91_DBGU AT91_BASE_DBGU0
19#else
20#define AT91_DBGU AT91_BASE_DBGU1
21#endif
22
17 .macro addruart, rp, rv, tmp 23 .macro addruart, rp, rv, tmp
18 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) 24 ldr \rp, =AT91_DBGU @ System peripherals (phys address)
19 ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) 25 ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address)
20 .endm 26 .endm
21 27
22 .macro senduart,rd,rx 28 .macro senduart,rd,rx
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 483478d8be6b..435764ee8490 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -16,6 +16,12 @@
16 16
17#include <asm/sizes.h> 17#include <asm/sizes.h>
18 18
19/* DBGU base */
20/* rm9200, 9260/9g20, 9261/9g10, 9rl */
21#define AT91_BASE_DBGU0 0xfffff200
22/* 9263, 9g45, cap9 */
23#define AT91_BASE_DBGU1 0xffffee00
24
19#if defined(CONFIG_ARCH_AT91RM9200) 25#if defined(CONFIG_ARCH_AT91RM9200)
20#include <mach/at91rm9200.h> 26#include <mach/at91rm9200.h>
21#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) 27#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 18bdcdeb474f..0234fd9d20d6 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -24,8 +24,10 @@
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/atmel_serial.h> 25#include <linux/atmel_serial.h>
26 26
27#if defined(CONFIG_AT91_EARLY_DBGU) 27#if defined(CONFIG_AT91_EARLY_DBGU0)
28#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS) 28#define UART_OFFSET AT91_BASE_DBGU0
29#elif defined(CONFIG_AT91_EARLY_DBGU1)
30#define UART_OFFSET AT91_BASE_DBGU1
29#elif defined(CONFIG_AT91_EARLY_USART0) 31#elif defined(CONFIG_AT91_EARLY_USART0)
30#define UART_OFFSET AT91_USART0 32#define UART_OFFSET AT91_USART0
31#elif defined(CONFIG_AT91_EARLY_USART1) 33#elif defined(CONFIG_AT91_EARLY_USART1)
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 053c36993154..242c26b2368d 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -93,9 +93,6 @@ void at91_iounmap(volatile void __iomem *addr)
93} 93}
94EXPORT_SYMBOL(at91_iounmap); 94EXPORT_SYMBOL(at91_iounmap);
95 95
96#define AT91_DBGU0 0xfffff200
97#define AT91_DBGU1 0xffffee00
98
99static void __init soc_detect(u32 dbgu_base) 96static void __init soc_detect(u32 dbgu_base)
100{ 97{
101 u32 cidr, socid; 98 u32 cidr, socid;
@@ -268,9 +265,9 @@ void __init at91_map_io(void)
268 at91_soc_initdata.type = AT91_SOC_NONE; 265 at91_soc_initdata.type = AT91_SOC_NONE;
269 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; 266 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
270 267
271 soc_detect(AT91_DBGU0); 268 soc_detect(AT91_BASE_DBGU0);
272 if (!at91_soc_is_detected()) 269 if (!at91_soc_is_detected())
273 soc_detect(AT91_DBGU1); 270 soc_detect(AT91_BASE_DBGU1);
274 271
275 if (!at91_soc_is_detected()) 272 if (!at91_soc_is_detected())
276 panic("AT91: Impossible to detect the SOC type"); 273 panic("AT91: Impossible to detect the SOC type");
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-01 00:22:14 -0500