Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This is the branch where we usually queue up cleanup efforts, moving
  drivers out of the architecture directory, header file restructuring,
  etc.  Sometimes they tangle with new development so it's hard to keep
  it strictly to cleanups.

  Some of the things included in this branch are:

   * Atmel SAMA5 conversion to common clock
   * Reset framework conversion for tegra platforms
    - Some of this depends on tegra clock driver reworks that are shared
      with Mike Turquette's clk tree.
   * Tegra DMA refactoring, which are shared branches with the DMA tree.
   * Removal of some header files on exynos to prepare for
     multiplatform"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
  ARM: mvebu: move Armada 370/XP specific definitions to armada-370-xp.h
  ARM: mvebu: remove prototypes of non-existing functions from common.h
  ARM: mvebu: move ARMADA_XP_MAX_CPUS to armada-370-xp.h
  serial: sh-sci: Rework baud rate calculation
  serial: sh-sci: Compute overrun_bit without using baud rate algo
  serial: sh-sci: Remove unused GPIO request code
  serial: sh-sci: Move overrun_bit and error_mask fields out of pdata
  serial: sh-sci: Support resources passed through platform resources
  serial: sh-sci: Don't check IRQ in verify port operation
  serial: sh-sci: Set the UPF_FIXED_PORT flag
  serial: sh-sci: Remove duplicate interrupt check in verify port op
  serial: sh-sci: Simplify baud rate calculation algorithms
  serial: sh-sci: Remove baud rate calculation algorithm 5
  serial: sh-sci: Sort headers alphabetically
  ARM: EXYNOS: Kill exynos_pm_late_initcall()
  ARM: EXYNOS: Consolidate selection of PM_GENERIC_DOMAINS for Exynos4
  ARM: at91: switch Calao QIL-A9260 board to DT
  clk: at91: fix pmc_clk_ids data type attriubte
  PM / devfreq: use inclusion <mach/map.h> instead of <plat/map-s5p.h>
  ARM: EXYNOS: remove <mach/regs-clock.h> for exynos
  ...

21 files changed, 96 insertions, 840 deletions

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 699b71e7f7ec..f1bf952da747 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -1,15 +1,33 @@
 if ARCH_AT91
 
+config HAVE_AT91_UTMI
+        bool
+
+config HAVE_AT91_USB_CLK
+        bool
+
 config HAVE_AT91_DBGU0
         bool
 
 config HAVE_AT91_DBGU1
         bool
 
+config AT91_USE_OLD_CLK
+        bool
+
 config AT91_PMC_UNIT
         bool
         default !ARCH_AT91X40
 
+config COMMON_CLK_AT91
+        bool
+        default AT91_PMC_UNIT && USE_OF && !AT91_USE_OLD_CLK
+        select COMMON_CLK
+
+config OLD_CLK_AT91
+        bool
+        default AT91_PMC_UNIT && AT91_USE_OLD_CLK
+
 config AT91_SAM9_ALT_RESET
         bool
         default !ARCH_AT91X40
@@ -21,6 +39,9 @@ config AT91_SAM9G45_RESET
 config AT91_SAM9_TIME
         bool
 
+config HAVE_AT91_SMD
+        bool
+
 config SOC_AT91SAM9
         bool
         select AT91_SAM9_TIME
@@ -61,10 +82,12 @@ comment "Atmel AT91 Processor"
 if SOC_SAM_V7
 config SOC_SAMA5D3
         bool "SAMA5D3 family"
-        depends on SOC_SAM_V7
         select SOC_SAMA5
         select HAVE_FB_ATMEL
         select HAVE_AT91_DBGU1
+        select HAVE_AT91_UTMI
+        select HAVE_AT91_SMD
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's SAMA5D3 family SoC.
           This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35.
@@ -78,11 +101,15 @@ config SOC_AT91RM9200
         select HAVE_AT91_DBGU0
         select MULTI_IRQ_HANDLER
         select SPARSE_IRQ
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
 
 config SOC_AT91SAM9260
         bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
         select HAVE_AT91_DBGU0
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
           or AT91SAM9G20 SoC.
@@ -92,6 +119,8 @@ config SOC_AT91SAM9261
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
 
@@ -100,18 +129,25 @@ config SOC_AT91SAM9263
         select HAVE_AT91_DBGU1
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
 
 config SOC_AT91SAM9RL
         bool "AT91SAM9RL"
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_UTMI
 
 config SOC_AT91SAM9G45
         bool "AT91SAM9G45 or AT91SAM9M10 families"
         select HAVE_AT91_DBGU1
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_UTMI
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
           This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
@@ -121,6 +157,10 @@ config SOC_AT91SAM9X5
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_UTMI
+        select HAVE_AT91_SMD
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
           This means that your SAM9 name finishes with a '5' (except if it is
@@ -133,6 +173,8 @@ config SOC_AT91SAM9N12
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
         select SOC_AT91SAM9
+        select AT91_USE_OLD_CLK
+        select HAVE_AT91_USB_CLK
         help
           Select this if you are using Atmel's AT91SAM9N12 SoC.
 
@@ -172,12 +214,6 @@ config MACH_SAMA5_DT
 
 comment "AT91 Feature Selections"
 
-config AT91_PROGRAMMABLE_CLOCKS
-        bool "Programmable Clocks"
-        help
-          Select this if you need to program one or more of the PCK0..PCK3
-          programmable clock outputs.
-
 config AT91_SLOW_CLOCK
         bool "Suspend-to-RAM disables main oscillator"
         depends on SUSPEND
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index 0363dba7d3f6..1f73e9b527da 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -12,26 +12,32 @@ config ARCH_AT91_NONE
 config ARCH_AT91RM9200
         bool "AT91RM9200"
         select SOC_AT91RM9200
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9260
         bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
         select SOC_AT91SAM9260
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9261
         bool "AT91SAM9261 or AT91SAM9G10"
         select SOC_AT91SAM9261
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9263
         bool "AT91SAM9263"
         select SOC_AT91SAM9263
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
         select SOC_AT91SAM9RL
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91SAM9G45
         bool "AT91SAM9G45"
         select SOC_AT91SAM9G45
+        select AT91_USE_OLD_CLK
 
 config ARCH_AT91X40
         bool "AT91x40"
@@ -176,12 +182,6 @@ config MACH_AFEB9260
           <svn://194.85.238.22/home/users/george/svn/arm9eb>
           <http://groups.google.com/group/arm9fpga-evolution-board>
 
-config MACH_QIL_A9260
-        bool "CALAO QIL-A9260 board"
-        help
-          Select this if you are using a Calao Systems QIL-A9260 Board.
-          <http://www.calao-systems.com>
-
 config MACH_CPU9260
         bool "Eukrea CPU9260 board"
         help
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 90aab2d5a07f..78e9cec282f4 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -7,7 +7,7 @@ obj-m		:=
 obj-n           :=
 obj-            :=
 
-obj-$(CONFIG_AT91_PMC_UNIT)     += clock.o
+obj-$(CONFIG_OLD_CLK_AT91)      += clock.o
 obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
 obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
 obj-$(CONFIG_AT91_SAM9_TIME)    += at91sam926x_time.o
@@ -52,7 +52,6 @@ obj-$(CONFIG_MACH_RSI_EWS)	+= board-rsi-ews.o
 obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
 obj-$(CONFIG_MACH_CAM60)        += board-cam60.o
 obj-$(CONFIG_MACH_SAM9_L9260)   += board-sam9-l9260.o
-obj-$(CONFIG_MACH_QIL_A9260)    += board-qil-a9260.o
 obj-$(CONFIG_MACH_AFEB9260)     += board-afeb-9260v1.o
 obj-$(CONFIG_MACH_CPU9260)      += board-cpu9krea.o
 obj-$(CONFIG_MACH_FLEXIBITY)    += board-flexibity.o
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 25805f2f6010..e47f5fd232f5 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -12,13 +12,13 @@
 
 #include <linux/module.h>
 #include <linux/reboot.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/system_misc.h>
 #include <mach/at91rm9200.h>
-#include <mach/at91_pmc.h>
 #include <mach/at91_st.h>
 #include <mach/cpu.h>
 
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index d6a1fa85371d..6c821e562159 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
@@ -20,7 +21,6 @@
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9260.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_aic.h"
 #include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 23ba1d8a1531..6276b4c1acfe 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
@@ -19,7 +20,6 @@
 #include <asm/system_misc.h>
 #include <mach/cpu.h>
 #include <mach/at91sam9261.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_aic.h"
 #include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 7eccb0fc57bc..37b90f4b990c 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
@@ -18,7 +19,6 @@
 #include <asm/mach/map.h>
 #include <asm/system_misc.h>
 #include <mach/at91sam9263.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_aic.h"
 #include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index bb392320a0dd..0f04ffe9c5a8 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -39,6 +39,7 @@
 static u32 pit_cycle;           /* write-once */
 static u32 pit_cnt;             /* access only w/system irq blocked */
 static void __iomem *pit_base_addr __read_mostly;
+static struct clk *mck;
 
 static inline unsigned int pit_read(unsigned int reg_offset)
 {
@@ -195,10 +196,14 @@ static int __init of_at91sam926x_pit_init(void)
         if (!pit_base_addr)
                 goto node_err;
 
+        mck = of_clk_get(np, 0);
+
         /* Get the interrupts property */
         ret = irq_of_parse_and_map(np, 0);
         if (!ret) {
                 pr_crit("AT91: PIT: Unable to get IRQ from DT\n");
+                if (!IS_ERR(mck))
+                        clk_put(mck);
                 goto ioremap_err;
         }
         at91sam926x_pit_irq.irq = ret;
@@ -230,6 +235,8 @@ void __init at91sam926x_pit_init(void)
         unsigned        bits;
         int             ret;
 
+        mck = ERR_PTR(-ENOENT);
+
         /* For device tree enabled device: initialize here */
         of_at91sam926x_pit_init();
 
@@ -237,7 +244,12 @@ void __init at91sam926x_pit_init(void)
          * Use our actual MCK to figure out how many MCK/16 ticks per
          * 1/HZ period (instead of a compile-time constant LATCH).
          */
-        pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16;
+        if (IS_ERR(mck))
+                mck = clk_get(NULL, "mck");
+
+        if (IS_ERR(mck))
+                panic("AT91: PIT: Unable to get mck clk\n");
+        pit_rate = clk_get_rate(mck) / 16;
         pit_cycle = (pit_rate + HZ/2) / HZ;
         WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
 
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9405aa08b104..2f455ce35268 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -12,13 +12,13 @@
 
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/system_misc.h>
 #include <mach/at91sam9g45.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "at91_aic.h"
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 388ec3aec4b9..4ef088c62eab 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -8,12 +8,12 @@
 
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/at91sam9n12.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "board.h"
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 0750ffb7e6b1..3651517abedf 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
@@ -19,7 +20,6 @@
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9rl.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_aic.h"
 #include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index e8a2e075a1b8..3e8ec26e39dc 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -8,12 +8,12 @@
 
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/at91sam9x5.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "board.h"
diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
index bf00d15d954d..075ec0576ada 100644
--- a/arch/arm/mach-at91/board-dt-sama5.c
+++ b/arch/arm/mach-at91/board-dt-sama5.c
@@ -16,6 +16,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/phy.h>
+#include <linux/clk-provider.h>
 
 #include <asm/setup.h>
 #include <asm/irq.h>
@@ -26,6 +27,13 @@
 #include "at91_aic.h"
 #include "generic.h"
 
+static void __init sama5_dt_timer_init(void)
+{
+#if defined(CONFIG_COMMON_CLK)
+        of_clk_init(NULL);
+#endif
+        at91sam926x_pit_init();
+}
 
 static const struct of_device_id irq_of_match[] __initconst = {
 
@@ -72,7 +80,7 @@ static const char *sama5_dt_board_compat[] __initdata = {
 
 DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
         /* Maintainer: Atmel */
-        .init_time      = at91sam926x_pit_init,
+        .init_time      = sama5_dt_timer_init,
         .map_io         = at91_map_io,
         .handle_irq     = at91_aic5_handle_irq,
         .init_early     = at91_dt_initialize,
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
deleted file mode 100644
index aa3bc9b0f150..000000000000
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/board-qil-a9260.c
- *
- *  Copyright (C) 2005 SAN People
- *  Copyright (C) 2006 Atmel
- *  Copyright (C) 2007 Calao-systems
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include <linux/types.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/gpio_keys.h>
-#include <linux/input.h>
-#include <linux/clk.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/at91sam9_smc.h>
-
-#include "at91_aic.h"
-#include "at91_shdwc.h"
-#include "board.h"
-#include "sam9_smc.h"
-#include "generic.h"
-
-
-static void __init ek_init_early(void)
-{
-        /* Initialize processor: 12.000 MHz crystal */
-        at91_initialize(12000000);
-}
-
-/*
- * USB Host port
- */
-static struct at91_usbh_data __initdata ek_usbh_data = {
-        .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
-};
-
-/*
- * USB Device port
- */
-static struct at91_udc_data __initdata ek_udc_data = {
-        .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
-};
-
-/*
- * SPI devices.
- */
-static struct spi_board_info ek_spi_devices[] = {
-#if defined(CONFIG_RTC_DRV_M41T94)
-        {       /* M41T94 RTC */
-                .modalias       = "m41t94",
-                .chip_select    = 0,
-                .max_speed_hz   = 1 * 1000 * 1000,
-                .bus_num        = 0,
-        }
-#endif
-};
-
-/*
- * MACB Ethernet device
- */
-static struct macb_platform_data __initdata ek_macb_data = {
-        .phy_irq_pin    = AT91_PIN_PA31,
-        .is_rmii        = 1,
-};
-
-/*
- * NAND flash
- */
-static struct mtd_partition __initdata ek_nand_partition[] = {
-        {
-                .name   = "Uboot & Kernel",
-                .offset = 0,
-                .size   = SZ_16M,
-        },
-        {
-                .name   = "Root FS",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = 120 * SZ_1M,
-        },
-        {
-                .name   = "FS",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = 120 * SZ_1M,
-        },
-};
-
-static struct atmel_nand_data __initdata ek_nand_data = {
-        .ale            = 21,
-        .cle            = 22,
-        .det_pin        = -EINVAL,
-        .rdy_pin        = AT91_PIN_PC13,
-        .enable_pin     = AT91_PIN_PC14,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
-};
-
-static struct sam9_smc_config __initdata ek_nand_smc_config = {
-        .ncs_read_setup         = 0,
-        .nrd_setup              = 1,
-        .ncs_write_setup        = 0,
-        .nwe_setup              = 1,
-
-        .ncs_read_pulse         = 3,
-        .nrd_pulse              = 3,
-        .ncs_write_pulse        = 3,
-        .nwe_pulse              = 3,
-
-        .read_cycle             = 5,
-        .write_cycle            = 5,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
-        .tdf_cycles             = 2,
-};
-
-static void __init ek_add_device_nand(void)
-{
-        /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
-
-        at91_add_device_nand(&ek_nand_data);
-}
-
-/*
- * MCI (SD/MMC)
- */
-static struct mci_platform_data __initdata ek_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
-};
-
-/*
- * GPIO Buttons
- */
-#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
-static struct gpio_keys_button ek_buttons[] = {
-        {       /* USER PUSH BUTTON */
-                .code           = KEY_ENTER,
-                .gpio           = AT91_PIN_PB10,
-                .active_low     = 1,
-                .desc           = "user_pb",
-                .wakeup         = 1,
-        }
-};
-
-static struct gpio_keys_platform_data ek_button_data = {
-        .buttons        = ek_buttons,
-        .nbuttons       = ARRAY_SIZE(ek_buttons),
-};
-
-static struct platform_device ek_button_device = {
-        .name           = "gpio-keys",
-        .id             = -1,
-        .num_resources  = 0,
-        .dev            = {
-                .platform_data  = &ek_button_data,
-        }
-};
-
-static void __init ek_add_device_buttons(void)
-{
-        at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
-        at91_set_deglitch(AT91_PIN_PB10, 1);
-
-        platform_device_register(&ek_button_device);
-}
-#else
-static void __init ek_add_device_buttons(void) {}
-#endif
-
-/*
- * LEDs
- */
-static struct gpio_led ek_leds[] = {
-        {       /* user_led (green) */
-                .name                   = "user_led",
-                .gpio                   = AT91_PIN_PB21,
-                .active_low             = 0,
-                .default_trigger        = "heartbeat",
-        }
-};
-
-static void __init ek_board_init(void)
-{
-        /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
-
-        /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
-        at91_add_device_serial();
-        /* USB Host */
-        at91_add_device_usbh(&ek_usbh_data);
-        /* USB Device */
-        at91_add_device_udc(&ek_udc_data);
-        /* SPI */
-        at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
-        /* NAND */
-        ek_add_device_nand();
-        /* I2C */
-        at91_add_device_i2c(NULL, 0);
-        /* Ethernet */
-        at91_add_device_eth(&ek_macb_data);
-        /* MMC */
-        at91_add_device_mci(0, &ek_mci0_data);
-        /* Push Buttons */
-        ek_add_device_buttons();
-        /* LEDs */
-        at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
-        /* shutdown controller, wakeup button (5 msec low) */
-        at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
-                                | AT91_SHDW_RTTWKEN);
-}
-
-MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
-        /* Maintainer: calao-systems */
-        .init_time      = at91sam926x_pit_init,
-        .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = ek_init_early,
-        .init_irq       = at91_init_irq_default,
-        .init_machine   = ek_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 6b2630a92f71..034529d801b2 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -24,9 +24,9 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/of_address.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <mach/hardware.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include <asm/proc-fns.h>
@@ -330,8 +330,6 @@ EXPORT_SYMBOL(clk_get_rate);
 
 /*------------------------------------------------------------------------*/
 
-#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
-
 /*
  * For now, only the programmable clocks support reparenting (MCK could
  * do this too, with care) or rate changing (the PLLs could do this too,
@@ -459,8 +457,6 @@ static void __init init_programmable_clock(struct clk *clk)
         clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr);
 }
 
-#endif  /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
-
 /*------------------------------------------------------------------------*/
 
 #ifdef CONFIG_DEBUG_FS
@@ -577,12 +573,10 @@ int __init clk_register(struct clk *clk)
                 clk->parent = &mck;
                 clk->mode = pmc_sys_mode;
         }
-#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
         else if (clk_is_programmable(clk)) {
                 clk->mode = pmc_sys_mode;
                 init_programmable_clock(clk);
         }
-#endif
 
         at91_clk_add(clk);
 
@@ -884,6 +878,11 @@ static int __init at91_pmc_init(unsigned long main_clock)
 #if defined(CONFIG_OF)
 static struct of_device_id pmc_ids[] = {
         { .compatible = "atmel,at91rm9200-pmc" },
+        { .compatible = "atmel,at91sam9260-pmc" },
+        { .compatible = "atmel,at91sam9g45-pmc" },
+        { .compatible = "atmel,at91sam9n12-pmc" },
+        { .compatible = "atmel,at91sam9x5-pmc" },
+        { .compatible = "atmel,sama5d3-pmc" },
         { /*sentinel*/ }
 };
 
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 26dee3ce9397..631fa3b8c16d 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -46,11 +46,12 @@ extern void at91sam926x_pit_init(void);
 extern void at91x40_timer_init(void);
 
  /* Clocks */
-#ifdef CONFIG_AT91_PMC_UNIT
+#ifdef CONFIG_OLD_CLK_AT91
 extern int __init at91_clock_init(unsigned long main_clock);
 extern int __init at91_dt_clock_init(void);
 #else
 static int inline at91_clock_init(unsigned long main_clock) { return 0; }
+static int inline at91_dt_clock_init(void) { return 0; }
 #endif
 struct device;
 
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
deleted file mode 100644
index c604cc69acb5..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ /dev/null
@@ -1,190 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_pmc.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Power Management Controller (PMC) - System peripherals registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_PMC_H
-#define AT91_PMC_H
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_pmc_base;
-
-#define at91_pmc_read(field) \
-        __raw_readl(at91_pmc_base + field)
-
-#define at91_pmc_write(field, value) \
-        __raw_writel(value, at91_pmc_base + field)
-#else
-.extern at91_pmc_base
-#endif
-
-#define AT91_PMC_SCER           0x00                    /* System Clock Enable Register */
-#define AT91_PMC_SCDR           0x04                    /* System Clock Disable Register */
-
-#define AT91_PMC_SCSR           0x08                    /* System Clock Status Register */
-#define         AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
-#define         AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */
-#define         AT91RM9200_PMC_MCKUDP   (1 <<  2)               /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
-#define         AT91RM9200_PMC_UHP      (1 <<  4)               /* USB Host Port Clock [AT91RM9200 only] */
-#define         AT91SAM926x_PMC_UHP     (1 <<  6)               /* USB Host Port Clock [AT91SAM926x only] */
-#define         AT91SAM926x_PMC_UDP     (1 <<  7)               /* USB Devcice Port Clock [AT91SAM926x only] */
-#define         AT91_PMC_PCK0           (1 <<  8)               /* Programmable Clock 0 */
-#define         AT91_PMC_PCK1           (1 <<  9)               /* Programmable Clock 1 */
-#define         AT91_PMC_PCK2           (1 << 10)               /* Programmable Clock 2 */
-#define         AT91_PMC_PCK3           (1 << 11)               /* Programmable Clock 3 */
-#define         AT91_PMC_PCK4           (1 << 12)               /* Programmable Clock 4 [AT572D940HF only] */
-#define         AT91_PMC_HCK0           (1 << 16)               /* AHB Clock (USB host) [AT91SAM9261 only] */
-#define         AT91_PMC_HCK1           (1 << 17)               /* AHB Clock (LCD) [AT91SAM9261 only] */
-
-#define AT91_PMC_PCER           0x10                    /* Peripheral Clock Enable Register */
-#define AT91_PMC_PCDR           0x14                    /* Peripheral Clock Disable Register */
-#define AT91_PMC_PCSR           0x18                    /* Peripheral Clock Status Register */
-
-#define AT91_CKGR_UCKR          0x1C                    /* UTMI Clock Register [some SAM9] */
-#define         AT91_PMC_UPLLEN         (1   << 16)             /* UTMI PLL Enable */
-#define         AT91_PMC_UPLLCOUNT      (0xf << 20)             /* UTMI PLL Start-up Time */
-#define         AT91_PMC_BIASEN         (1   << 24)             /* UTMI BIAS Enable */
-#define         AT91_PMC_BIASCOUNT      (0xf << 28)             /* UTMI BIAS Start-up Time */
-
-#define AT91_CKGR_MOR           0x20                    /* Main Oscillator Register [not on SAM9RL] */
-#define         AT91_PMC_MOSCEN         (1    <<  0)            /* Main Oscillator Enable */
-#define         AT91_PMC_OSCBYPASS      (1    <<  1)            /* Oscillator Bypass */
-#define         AT91_PMC_MOSCRCEN       (1    <<  3)            /* Main On-Chip RC Oscillator Enable [some SAM9] */
-#define         AT91_PMC_OSCOUNT        (0xff <<  8)            /* Main Oscillator Start-up Time */
-#define         AT91_PMC_KEY            (0x37 << 16)            /* MOR Writing Key */
-#define         AT91_PMC_MOSCSEL        (1    << 24)            /* Main Oscillator Selection [some SAM9] */
-#define         AT91_PMC_CFDEN          (1    << 25)            /* Clock Failure Detector Enable [some SAM9] */
-
-#define AT91_CKGR_MCFR          0x24                    /* Main Clock Frequency Register */
-#define         AT91_PMC_MAINF          (0xffff <<  0)          /* Main Clock Frequency */
-#define         AT91_PMC_MAINRDY        (1      << 16)          /* Main Clock Ready */
-
-#define AT91_CKGR_PLLAR         0x28                    /* PLL A Register */
-#define AT91_CKGR_PLLBR         0x2c                    /* PLL B Register */
-#define         AT91_PMC_DIV            (0xff  <<  0)           /* Divider */
-#define         AT91_PMC_PLLCOUNT       (0x3f  <<  8)           /* PLL Counter */
-#define         AT91_PMC_OUT            (3     << 14)           /* PLL Clock Frequency Range */
-#define         AT91_PMC_MUL            (0x7ff << 16)           /* PLL Multiplier */
-#define         AT91_PMC_MUL_GET(n)     ((n) >> 16 & 0x7ff)
-#define         AT91_PMC3_MUL           (0x7f  << 18)           /* PLL Multiplier [SAMA5 only] */
-#define         AT91_PMC3_MUL_GET(n)    ((n) >> 18 & 0x7f)
-#define         AT91_PMC_USBDIV         (3     << 28)           /* USB Divisor (PLLB only) */
-#define                 AT91_PMC_USBDIV_1               (0 << 28)
-#define                 AT91_PMC_USBDIV_2               (1 << 28)
-#define                 AT91_PMC_USBDIV_4               (2 << 28)
-#define         AT91_PMC_USB96M         (1     << 28)           /* Divider by 2 Enable (PLLB only) */
-
-#define AT91_PMC_MCKR           0x30                    /* Master Clock Register */
-#define         AT91_PMC_CSS            (3 <<  0)               /* Master Clock Selection */
-#define                 AT91_PMC_CSS_SLOW               (0 << 0)
-#define                 AT91_PMC_CSS_MAIN               (1 << 0)
-#define                 AT91_PMC_CSS_PLLA               (2 << 0)
-#define                 AT91_PMC_CSS_PLLB               (3 << 0)
-#define                 AT91_PMC_CSS_UPLL               (3 << 0)        /* [some SAM9 only] */
-#define         PMC_PRES_OFFSET         2
-#define         AT91_PMC_PRES           (7 <<  PMC_PRES_OFFSET)         /* Master Clock Prescaler */
-#define                 AT91_PMC_PRES_1                 (0 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_2                 (1 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_4                 (2 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_8                 (3 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_16                (4 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_32                (5 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_64                (6 << PMC_PRES_OFFSET)
-#define         PMC_ALT_PRES_OFFSET     4
-#define         AT91_PMC_ALT_PRES       (7 <<  PMC_ALT_PRES_OFFSET)             /* Master Clock Prescaler [alternate location] */
-#define                 AT91_PMC_ALT_PRES_1             (0 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_2             (1 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_4             (2 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_8             (3 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_16            (4 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_32            (5 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_64            (6 << PMC_ALT_PRES_OFFSET)
-#define         AT91_PMC_MDIV           (3 <<  8)               /* Master Clock Division */
-#define                 AT91RM9200_PMC_MDIV_1           (0 << 8)        /* [AT91RM9200 only] */
-#define                 AT91RM9200_PMC_MDIV_2           (1 << 8)
-#define                 AT91RM9200_PMC_MDIV_3           (2 << 8)
-#define                 AT91RM9200_PMC_MDIV_4           (3 << 8)
-#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9 only] */
-#define                 AT91SAM9_PMC_MDIV_2             (1 << 8)
-#define                 AT91SAM9_PMC_MDIV_4             (2 << 8)
-#define                 AT91SAM9_PMC_MDIV_6             (3 << 8)        /* [some SAM9 only] */
-#define                 AT91SAM9_PMC_MDIV_3             (3 << 8)        /* [some SAM9 only] */
-#define         AT91_PMC_PDIV           (1 << 12)               /* Processor Clock Division [some SAM9 only] */
-#define                 AT91_PMC_PDIV_1                 (0 << 12)
-#define                 AT91_PMC_PDIV_2                 (1 << 12)
-#define         AT91_PMC_PLLADIV2       (1 << 12)               /* PLLA divisor by 2 [some SAM9 only] */
-#define                 AT91_PMC_PLLADIV2_OFF           (0 << 12)
-#define                 AT91_PMC_PLLADIV2_ON            (1 << 12)
-
-#define AT91_PMC_USB            0x38                    /* USB Clock Register [some SAM9 only] */
-#define         AT91_PMC_USBS           (0x1 <<  0)             /* USB OHCI Input clock selection */
-#define                 AT91_PMC_USBS_PLLA              (0 << 0)
-#define                 AT91_PMC_USBS_UPLL              (1 << 0)
-#define                 AT91_PMC_USBS_PLLB              (1 << 0)        /* [AT91SAMN12 only] */
-#define         AT91_PMC_OHCIUSBDIV     (0xF <<  8)             /* Divider for USB OHCI Clock */
-#define                 AT91_PMC_OHCIUSBDIV_1   (0x0 <<  8)
-#define                 AT91_PMC_OHCIUSBDIV_2   (0x1 <<  8)
-
-#define AT91_PMC_SMD            0x3c                    /* Soft Modem Clock Register [some SAM9 only] */
-#define         AT91_PMC_SMDS           (0x1  <<  0)            /* SMD input clock selection */
-#define         AT91_PMC_SMD_DIV        (0x1f <<  8)            /* SMD input clock divider */
-#define         AT91_PMC_SMDDIV(n)      (((n) <<  8) & AT91_PMC_SMD_DIV)
-
-#define AT91_PMC_PCKR(n)        (0x40 + ((n) * 4))      /* Programmable Clock 0-N Registers */
-#define         AT91_PMC_ALT_PCKR_CSS   (0x7 <<  0)             /* Programmable Clock Source Selection [alternate length] */
-#define                 AT91_PMC_CSS_MASTER             (4 << 0)        /* [some SAM9 only] */
-#define         AT91_PMC_CSSMCK         (0x1 <<  8)             /* CSS or Master Clock Selection */
-#define                 AT91_PMC_CSSMCK_CSS             (0 << 8)
-#define                 AT91_PMC_CSSMCK_MCK             (1 << 8)
-
-#define AT91_PMC_IER            0x60                    /* Interrupt Enable Register */
-#define AT91_PMC_IDR            0x64                    /* Interrupt Disable Register */
-#define AT91_PMC_SR             0x68                    /* Status Register */
-#define         AT91_PMC_MOSCS          (1 <<  0)               /* MOSCS Flag */
-#define         AT91_PMC_LOCKA          (1 <<  1)               /* PLLA Lock */
-#define         AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
-#define         AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
-#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9] */
-#define         AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
-#define         AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
-#define         AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
-#define         AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
-#define         AT91_PMC_MOSCSELS       (1 << 16)               /* Main Oscillator Selection [some SAM9] */
-#define         AT91_PMC_MOSCRCS        (1 << 17)               /* Main On-Chip RC [some SAM9] */
-#define         AT91_PMC_CFDEV          (1 << 18)               /* Clock Failure Detector Event [some SAM9] */
-#define AT91_PMC_IMR            0x6c                    /* Interrupt Mask Register */
-
-#define AT91_PMC_PROT           0xe4                    /* Write Protect Mode Register [some SAM9] */
-#define         AT91_PMC_WPEN           (0x1  <<  0)            /* Write Protect Enable */
-#define         AT91_PMC_WPKEY          (0xffffff << 8)         /* Write Protect Key */
-#define         AT91_PMC_PROTKEY        (0x504d43 << 8)         /* Activation Code */
-
-#define AT91_PMC_WPSR           0xe8                    /* Write Protect Status Register [some SAM9] */
-#define         AT91_PMC_WPVS           (0x1  <<  0)            /* Write Protect Violation Status */
-#define         AT91_PMC_WPVSRC         (0xffff  <<  8)         /* Write Protect Violation Source */
-
-#define AT91_PMC_PCER1          0x100                   /* Peripheral Clock Enable Register 1 [SAMA5 only]*/
-#define AT91_PMC_PCDR1          0x104                   /* Peripheral Clock Enable Register 1 */
-#define AT91_PMC_PCSR1          0x108                   /* Peripheral Clock Enable Register 1 */
-
-#define AT91_PMC_PCR            0x10c                   /* Peripheral Control Register [some SAM9 and SAMA5] */
-#define         AT91_PMC_PCR_PID        (0x3f  <<  0)           /* Peripheral ID */
-#define         AT91_PMC_PCR_CMD        (0x1  <<  12)           /* Command (read=0, write=1) */
-#define         AT91_PMC_PCR_DIV(n)     ((n)  <<  16)           /* Divisor Value */
-#define                 AT91_PMC_PCR_DIV0       0x0                     /* Peripheral clock is MCK */
-#define                 AT91_PMC_PCR_DIV2       0x1                     /* Peripheral clock is MCK/2 */
-#define                 AT91_PMC_PCR_DIV4       0x2                     /* Peripheral clock is MCK/4 */
-#define                 AT91_PMC_PCR_DIV8       0x3                     /* Peripheral clock is MCK/8 */
-#define         AT91_PMC_PCR_EN         (0x1  <<  28)           /* Enable */
-
-#endif
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 9986542e8060..590b52dea9f7 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -19,13 +19,13 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <linux/atomic.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "at91_aic.h"
@@ -155,9 +155,6 @@ static int at91_pm_verify_clocks(void)
                 }
         }
 
-        if (!IS_ENABLED(CONFIG_AT91_PROGRAMMABLE_CLOCKS))
-                return 1;
-
         /* PCK0..PCK3 must be disabled, or configured to use clk32k */
         for (i = 0; i < 4; i++) {
                 u32 css;
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 098c28ddf025..20018779bae7 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -13,8 +13,8 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/clk/at91_pmc.h>
 #include <mach/hardware.h>
-#include <mach/at91_pmc.h>
 #include <mach/at91_ramc.h>
 
 
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index a28873fe3049..3d775d08de08 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -9,360 +9,19 @@
 
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/sama5d3.h>
-#include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
 #include "soc.h"
 #include "generic.h"
-#include "clock.h"
 #include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
- *  Clocks
- * -------------------------------------------------------------------- */
-
-/*
- * The peripheral clocks.
- */
-
-static struct clk pioA_clk = {
-        .name           = "pioA_clk",
-        .pid            = SAMA5D3_ID_PIOA,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioB_clk = {
-        .name           = "pioB_clk",
-        .pid            = SAMA5D3_ID_PIOB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioC_clk = {
-        .name           = "pioC_clk",
-        .pid            = SAMA5D3_ID_PIOC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioD_clk = {
-        .name           = "pioD_clk",
-        .pid            = SAMA5D3_ID_PIOD,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioE_clk = {
-        .name           = "pioE_clk",
-        .pid            = SAMA5D3_ID_PIOE,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart0_clk = {
-        .name           = "usart0_clk",
-        .pid            = SAMA5D3_ID_USART0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk usart1_clk = {
-        .name           = "usart1_clk",
-        .pid            = SAMA5D3_ID_USART1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk usart2_clk = {
-        .name           = "usart2_clk",
-        .pid            = SAMA5D3_ID_USART2,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk usart3_clk = {
-        .name           = "usart3_clk",
-        .pid            = SAMA5D3_ID_USART3,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk uart0_clk = {
-        .name           = "uart0_clk",
-        .pid            = SAMA5D3_ID_UART0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk uart1_clk = {
-        .name           = "uart1_clk",
-        .pid            = SAMA5D3_ID_UART1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk twi0_clk = {
-        .name           = "twi0_clk",
-        .pid            = SAMA5D3_ID_TWI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV8,
-};
-static struct clk twi1_clk = {
-        .name           = "twi1_clk",
-        .pid            = SAMA5D3_ID_TWI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV8,
-};
-static struct clk twi2_clk = {
-        .name           = "twi2_clk",
-        .pid            = SAMA5D3_ID_TWI2,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV8,
-};
-static struct clk mmc0_clk = {
-        .name           = "mci0_clk",
-        .pid            = SAMA5D3_ID_HSMCI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc1_clk = {
-        .name           = "mci1_clk",
-        .pid            = SAMA5D3_ID_HSMCI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc2_clk = {
-        .name           = "mci2_clk",
-        .pid            = SAMA5D3_ID_HSMCI2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi0_clk = {
-        .name           = "spi0_clk",
-        .pid            = SAMA5D3_ID_SPI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi1_clk = {
-        .name           = "spi1_clk",
-        .pid            = SAMA5D3_ID_SPI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tcb0_clk = {
-        .name           = "tcb0_clk",
-        .pid            = SAMA5D3_ID_TC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk tcb1_clk = {
-        .name           = "tcb1_clk",
-        .pid            = SAMA5D3_ID_TC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk adc_clk = {
-        .name           = "adc_clk",
-        .pid            = SAMA5D3_ID_ADC,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk adc_op_clk = {
-        .name           = "adc_op_clk",
-        .type           = CLK_TYPE_PERIPHERAL,
-        .rate_hz        = 5000000,
-};
-static struct clk dma0_clk = {
-        .name           = "dma0_clk",
-        .pid            = SAMA5D3_ID_DMA0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk dma1_clk = {
-        .name           = "dma1_clk",
-        .pid            = SAMA5D3_ID_DMA1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk uhphs_clk = {
-        .name           = "uhphs",
-        .pid            = SAMA5D3_ID_UHPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk udphs_clk = {
-        .name           = "udphs_clk",
-        .pid            = SAMA5D3_ID_UDPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* gmac only for sama5d33, sama5d34, sama5d35 */
-static struct clk macb0_clk = {
-        .name           = "macb0_clk",
-        .pid            = SAMA5D3_ID_GMAC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* emac only for sama5d31, sama5d35 */
-static struct clk macb1_clk = {
-        .name           = "macb1_clk",
-        .pid            = SAMA5D3_ID_EMAC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* lcd only for sama5d31, sama5d33, sama5d34 */
-static struct clk lcdc_clk = {
-        .name           = "lcdc_clk",
-        .pid            = SAMA5D3_ID_LCDC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* isi only for sama5d33, sama5d35 */
-static struct clk isi_clk = {
-        .name           = "isi_clk",
-        .pid            = SAMA5D3_ID_ISI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk can0_clk = {
-        .name           = "can0_clk",
-        .pid            = SAMA5D3_ID_CAN0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk can1_clk = {
-        .name           = "can1_clk",
-        .pid            = SAMA5D3_ID_CAN1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk ssc0_clk = {
-        .name           = "ssc0_clk",
-        .pid            = SAMA5D3_ID_SSC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk ssc1_clk = {
-        .name           = "ssc1_clk",
-        .pid            = SAMA5D3_ID_SSC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
-};
-static struct clk sha_clk = {
-        .name           = "sha_clk",
-        .pid            = SAMA5D3_ID_SHA,
-        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV8,
-};
-static struct clk aes_clk = {
-        .name           = "aes_clk",
-        .pid            = SAMA5D3_ID_AES,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tdes_clk = {
-        .name           = "tdes_clk",
-        .pid            = SAMA5D3_ID_TDES,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-
-static struct clk *periph_clocks[] __initdata = {
-        &pioA_clk,
-        &pioB_clk,
-        &pioC_clk,
-        &pioD_clk,
-        &pioE_clk,
-        &usart0_clk,
-        &usart1_clk,
-        &usart2_clk,
-        &usart3_clk,
-        &uart0_clk,
-        &uart1_clk,
-        &twi0_clk,
-        &twi1_clk,
-        &twi2_clk,
-        &mmc0_clk,
-        &mmc1_clk,
-        &mmc2_clk,
-        &spi0_clk,
-        &spi1_clk,
-        &tcb0_clk,
-        &tcb1_clk,
-        &adc_clk,
-        &adc_op_clk,
-        &dma0_clk,
-        &dma1_clk,
-        &uhphs_clk,
-        &udphs_clk,
-        &macb0_clk,
-        &macb1_clk,
-        &lcdc_clk,
-        &isi_clk,
-        &can0_clk,
-        &can1_clk,
-        &ssc0_clk,
-        &ssc1_clk,
-        &sha_clk,
-        &aes_clk,
-        &tdes_clk,
-};
-
-static struct clk pck0 = {
-        .name           = "pck0",
-        .pmc_mask       = AT91_PMC_PCK0,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 0,
-};
-
-static struct clk pck1 = {
-        .name           = "pck1",
-        .pmc_mask       = AT91_PMC_PCK1,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 1,
-};
-
-static struct clk pck2 = {
-        .name           = "pck2",
-        .pmc_mask       = AT91_PMC_PCK2,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 2,
-};
-
-static struct clk_lookup periph_clocks_lookups[] = {
-        /* lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
-        CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioD_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioE_clk),
-        CLKDEV_CON_DEV_ID("usart", "f001c000.serial", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "f0020000.serial", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart2_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart3_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f0014000.i2c", &twi0_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f0018000.i2c", &twi1_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f801c000.i2c", &twi2_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f0000000.mmc", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f8000000.mmc", &mmc1_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f8004000.mmc", &mmc2_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi0_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "f8008000.spi", &spi1_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "f0010000.timer", &tcb0_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "f8014000.timer", &tcb1_clk),
-        CLKDEV_CON_DEV_ID("tsc_clk", "f8018000.tsadcc", &adc_clk),
-        CLKDEV_CON_DEV_ID("dma_clk", "ffffe600.dma-controller", &dma0_clk),
-        CLKDEV_CON_DEV_ID("dma_clk", "ffffe800.dma-controller", &dma1_clk),
-        CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk),
-        CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk),
-        CLKDEV_CON_DEV_ID("hclk", "f0028000.ethernet", &macb0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f0028000.ethernet", &macb0_clk),
-        CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f802c000.ethernet", &macb1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f0008000.ssc", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f000c000.ssc", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("can_clk", "f000c000.can", &can0_clk),
-        CLKDEV_CON_DEV_ID("can_clk", "f8010000.can", &can1_clk),
-        CLKDEV_CON_DEV_ID("sha_clk", "f8034000.sha", &sha_clk),
-        CLKDEV_CON_DEV_ID("aes_clk", "f8038000.aes", &aes_clk),
-        CLKDEV_CON_DEV_ID("tdes_clk", "f803c000.tdes", &tdes_clk),
-};
-
-static void __init sama5d3_register_clocks(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-                clk_register(periph_clocks[i]);
-
-        clkdev_add_table(periph_clocks_lookups,
-                         ARRAY_SIZE(periph_clocks_lookups));
-
-        clk_register(&pck0);
-        clk_register(&pck1);
-        clk_register(&pck2);
-}
-
-/* --------------------------------------------------------------------
  *  AT91SAM9x5 processor initialization
  * -------------------------------------------------------------------- */
 
@@ -378,6 +37,5 @@ static void __init sama5d3_initialize(void)
 
 AT91_SOC_START(sama5d3)
         .map_io = sama5d3_map_io,
-        .register_clocks = sama5d3_register_clocks,
         .init = sama5d3_initialize,
 AT91_SOC_END
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 2742e00ec5d6..9dc8894c5623 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -11,6 +11,7 @@
 #include <linux/pm.h>
 #include <linux/of_address.h>
 #include <linux/pinctrl/machine.h>
+#include <linux/clk/at91_pmc.h>
 
 #include <asm/system_misc.h>
 #include <asm/mach/map.h>
@@ -18,7 +19,6 @@
 #include <mach/hardware.h>
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
-#include <mach/at91_pmc.h>
 
 #include "at91_shdwc.h"
 #include "soc.h"
@@ -491,7 +491,8 @@ void __init at91rm9200_dt_initialize(void)
         at91_dt_clock_init();
 
         /* Register the processor-specific clocks */
-        at91_boot_soc.register_clocks();
+        if (at91_boot_soc.register_clocks)
+                at91_boot_soc.register_clocks();
 
         at91_boot_soc.init();
 }
@@ -506,7 +507,8 @@ void __init at91_dt_initialize(void)
         at91_dt_clock_init();
 
         /* Register the processor-specific clocks */
-        at91_boot_soc.register_clocks();
+        if (at91_boot_soc.register_clocks)
+                at91_boot_soc.register_clocks();
 
         if (at91_boot_soc.init)
                 at91_boot_soc.init();