diff options
author | Kevin Hilman <khilman@linaro.org> | 2013-12-20 11:59:04 -0500 |
---|---|---|
committer | Kevin Hilman <khilman@linaro.org> | 2013-12-20 11:59:30 -0500 |
commit | 490b929d42d2a321887f9538a83fc9f215675f15 (patch) | |
tree | 04fe7161f92c568839605f92c8f1c8730216f739 /arch/arm/mach-at91 | |
parent | 23621799f24c3c4e8e8dcdf5fdeb3ebd2be148f9 (diff) | |
parent | ef43eff3447f30b4a3cfc61813902c2e57c20245 (diff) |
Merge branch 'efm32/soc' into next/soc
From Uwe Kleine-König:
* efm32/soc: (1003 commits)
ARM: device trees for Energy Micro's EFM32 Cortex-M3 SoCs
ARM: new platform for Energy Micro's EFM32 Cortex-M3 SoCs
+Linux 3.13-rc4
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r-- | arch/arm/mach-at91/at91rm9200_time.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-at91/pm.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-at91/sama5d3.c | 6 |
3 files changed, 9 insertions, 8 deletions
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index f607deb40f4d..bc7b363a3083 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c | |||
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) | |||
174 | static struct clock_event_device clkevt = { | 174 | static struct clock_event_device clkevt = { |
175 | .name = "at91_tick", | 175 | .name = "at91_tick", |
176 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 176 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
177 | .shift = 32, | ||
178 | .rating = 150, | 177 | .rating = 150, |
179 | .set_next_event = clkevt32k_next_event, | 178 | .set_next_event = clkevt32k_next_event, |
180 | .set_mode = clkevt32k_mode, | 179 | .set_mode = clkevt32k_mode, |
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void) | |||
265 | at91_st_write(AT91_ST_RTMR, 1); | 264 | at91_st_write(AT91_ST_RTMR, 1); |
266 | 265 | ||
267 | /* Setup timer clockevent, with minimum of two ticks (important!!) */ | 266 | /* Setup timer clockevent, with minimum of two ticks (important!!) */ |
268 | clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift); | ||
269 | clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt); | ||
270 | clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1; | ||
271 | clkevt.cpumask = cpumask_of(0); | 267 | clkevt.cpumask = cpumask_of(0); |
272 | clockevents_register_device(&clkevt); | 268 | clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK, |
269 | 2, AT91_ST_ALMV); | ||
273 | 270 | ||
274 | /* register clocksource */ | 271 | /* register clocksource */ |
275 | clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); | 272 | clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); |
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 3ed190ce062b..c5101dcb4fb0 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h | |||
@@ -16,7 +16,11 @@ | |||
16 | #include <mach/at91_ramc.h> | 16 | #include <mach/at91_ramc.h> |
17 | #include <mach/at91rm9200_sdramc.h> | 17 | #include <mach/at91rm9200_sdramc.h> |
18 | 18 | ||
19 | #ifdef CONFIG_PM | ||
19 | extern void at91_pm_set_standby(void (*at91_standby)(void)); | 20 | extern void at91_pm_set_standby(void (*at91_standby)(void)); |
21 | #else | ||
22 | static inline void at91_pm_set_standby(void (*at91_standby)(void)) { } | ||
23 | #endif | ||
20 | 24 | ||
21 | /* | 25 | /* |
22 | * The AT91RM9200 goes into self-refresh mode with this command, and will | 26 | * The AT91RM9200 goes into self-refresh mode with this command, and will |
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c index 3ea86428ee09..a28873fe3049 100644 --- a/arch/arm/mach-at91/sama5d3.c +++ b/arch/arm/mach-at91/sama5d3.c | |||
@@ -95,19 +95,19 @@ static struct clk twi0_clk = { | |||
95 | .name = "twi0_clk", | 95 | .name = "twi0_clk", |
96 | .pid = SAMA5D3_ID_TWI0, | 96 | .pid = SAMA5D3_ID_TWI0, |
97 | .type = CLK_TYPE_PERIPHERAL, | 97 | .type = CLK_TYPE_PERIPHERAL, |
98 | .div = AT91_PMC_PCR_DIV2, | 98 | .div = AT91_PMC_PCR_DIV8, |
99 | }; | 99 | }; |
100 | static struct clk twi1_clk = { | 100 | static struct clk twi1_clk = { |
101 | .name = "twi1_clk", | 101 | .name = "twi1_clk", |
102 | .pid = SAMA5D3_ID_TWI1, | 102 | .pid = SAMA5D3_ID_TWI1, |
103 | .type = CLK_TYPE_PERIPHERAL, | 103 | .type = CLK_TYPE_PERIPHERAL, |
104 | .div = AT91_PMC_PCR_DIV2, | 104 | .div = AT91_PMC_PCR_DIV8, |
105 | }; | 105 | }; |
106 | static struct clk twi2_clk = { | 106 | static struct clk twi2_clk = { |
107 | .name = "twi2_clk", | 107 | .name = "twi2_clk", |
108 | .pid = SAMA5D3_ID_TWI2, | 108 | .pid = SAMA5D3_ID_TWI2, |
109 | .type = CLK_TYPE_PERIPHERAL, | 109 | .type = CLK_TYPE_PERIPHERAL, |
110 | .div = AT91_PMC_PCR_DIV2, | 110 | .div = AT91_PMC_PCR_DIV8, |
111 | }; | 111 | }; |
112 | static struct clk mmc0_clk = { | 112 | static struct clk mmc0_clk = { |
113 | .name = "mci0_clk", | 113 | .name = "mci0_clk", |