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authorWenyou Yang <wenyou.yang@atmel.com>2015-03-08 23:49:46 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2015-03-13 08:34:53 -0400
commit23be4be5a666c6b4e6fe8ddbbb84fb4f2efee0a5 (patch)
treecc34cdd0a35d9a7a23b6bd33876c963fce00bd89 /arch/arm/mach-at91/pm_slowclock.S
parentd94e688cae5661b18164fb7366d1696a1921baba (diff)
ARM: at91/pm: standby mode uses same sram function as suspend to memory mode
To simply the PM code, the suspend to standby mode uses same sram function as the suspend to memory mode, running in the internal SRAM, instead of the respective code for each mode. For the suspend to standby mode, the master clock doesn't switch to the slow clock, and PLLA and the main oscillator doesn't turn off as well. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/pm_slowclock.S')
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S25
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 4c5a363646dd..db35f72e7bad 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -15,6 +15,7 @@
15#include <linux/clk/at91_pmc.h> 15#include <linux/clk/at91_pmc.h>
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17#include <mach/at91_ramc.h> 17#include <mach/at91_ramc.h>
18#include "pm.h"
18 19
19#define SRAMC_SELF_FRESH_ACTIVE 0x01 20#define SRAMC_SELF_FRESH_ACTIVE 0x01
20#define SRAMC_SELF_FRESH_EXIT 0x00 21#define SRAMC_SELF_FRESH_EXIT 0x00
@@ -78,12 +79,22 @@ ENTRY(at91_slow_clock)
78 str r0, .pmc_base 79 str r0, .pmc_base
79 str r1, .sramc_base 80 str r1, .sramc_base
80 str r2, .sramc1_base 81 str r2, .sramc1_base
81 str r3, .memtype 82
83 and r0, r3, #AT91_PM_MEMTYPE_MASK
84 str r0, .memtype
85
86 lsr r0, r3, #AT91_PM_MODE_OFFSET
87 and r0, r0, #AT91_PM_MODE_MASK
88 str r0, .pm_mode
82 89
83 /* Active the self-refresh mode */ 90 /* Active the self-refresh mode */
84 mov r0, #SRAMC_SELF_FRESH_ACTIVE 91 mov r0, #SRAMC_SELF_FRESH_ACTIVE
85 bl at91_sramc_self_refresh 92 bl at91_sramc_self_refresh
86 93
94 ldr r0, .pm_mode
95 tst r0, #AT91_PM_SLOW_CLOCK
96 beq skip_disable_main_clock
97
87 ldr pmc, .pmc_base 98 ldr pmc, .pmc_base
88 99
89 /* Save Master clock setting */ 100 /* Save Master clock setting */
@@ -112,9 +123,18 @@ ENTRY(at91_slow_clock)
112 orr tmp1, tmp1, #AT91_PMC_KEY 123 orr tmp1, tmp1, #AT91_PMC_KEY
113 str tmp1, [pmc, #AT91_CKGR_MOR] 124 str tmp1, [pmc, #AT91_CKGR_MOR]
114 125
126skip_disable_main_clock:
127 ldr pmc, .pmc_base
128
115 /* Wait for interrupt */ 129 /* Wait for interrupt */
116 mcr p15, 0, tmp1, c7, c0, 4 130 mcr p15, 0, tmp1, c7, c0, 4
117 131
132 ldr r0, .pm_mode
133 tst r0, #AT91_PM_SLOW_CLOCK
134 beq skip_enable_main_clock
135
136 ldr pmc, .pmc_base
137
118 /* Turn on the main oscillator */ 138 /* Turn on the main oscillator */
119 ldr tmp1, [pmc, #AT91_CKGR_MOR] 139 ldr tmp1, [pmc, #AT91_CKGR_MOR]
120 orr tmp1, tmp1, #AT91_PMC_MOSCEN 140 orr tmp1, tmp1, #AT91_PMC_MOSCEN
@@ -143,6 +163,7 @@ ENTRY(at91_slow_clock)
143 163
144 wait_mckrdy 164 wait_mckrdy
145 165
166skip_enable_main_clock:
146 /* Exit the self-refresh mode */ 167 /* Exit the self-refresh mode */
147 mov r0, #SRAMC_SELF_FRESH_EXIT 168 mov r0, #SRAMC_SELF_FRESH_EXIT
148 bl at91_sramc_self_refresh 169 bl at91_sramc_self_refresh
@@ -284,6 +305,8 @@ ENDPROC(at91_sramc_self_refresh)
284 .word 0 305 .word 0
285.memtype: 306.memtype:
286 .word 0 307 .word 0
308.pm_mode:
309 .word 0
287.saved_mckr: 310.saved_mckr:
288 .word 0 311 .word 0
289.saved_pllar: 312.saved_pllar: