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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-02-22 11:50:54 -0500
committerNicolas Ferre <nicolas.ferre@atmel.com>2012-02-23 03:26:41 -0500
commit8ff12ad3df62ee343d5f5ec29572b9d2c5c2cedd (patch)
tree96a4c446fc380bffb040418beffbc3ba7cc438b1 /arch/arm/mach-at91/pm.c
parent0dcfed1486739afdce053ebdccac28076e9d9e1f (diff)
ARM: at91/pm_slowclock: function slow_clock() accepts parameters
Change slow_clock()/at91_slow_clock() prototype to accept the PMC base address and one or two RAM controller addresses by parameters. The r0, r1 and r2 registers are used differently and preserved during function call. Those values are defined in pm.c and slow_clock() function is called from there with its new parameters. This will allow to have a soc independent pm_slowclock. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Ached-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/pm.c')
-rw-r--r--arch/arm/mach-at91/pm.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index d554e6771b4e..aac00cecbf4f 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -188,13 +188,27 @@ int at91_suspend_entering_slow_clock(void)
188EXPORT_SYMBOL(at91_suspend_entering_slow_clock); 188EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
189 189
190 190
191static void (*slow_clock)(void); 191static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1);
192 192
193#ifdef CONFIG_AT91_SLOW_CLOCK 193#ifdef CONFIG_AT91_SLOW_CLOCK
194extern void at91_slow_clock(void); 194extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1);
195extern u32 at91_slow_clock_sz; 195extern u32 at91_slow_clock_sz;
196#endif 196#endif
197 197
198static void __iomem *at91_pmc_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_PMC);
199#ifdef CONFIG_ARCH_AT91RM9200
200static void __iomem *at91_ramc0_base = (void __iomem*)AT91_VA_BASE_SYS;
201#elif defined(CONFIG_ARCH_AT91SAM9G45)
202static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC0);
203#else
204static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_SDRAMC0);
205#endif
206
207#if defined(CONFIG_ARCH_AT91SAM9G45)
208static void __iomem *at91_ramc1_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC1);
209#else
210static void __iomem *at91_ramc1_base = NULL;
211#endif
198 212
199static int at91_pm_enter(suspend_state_t state) 213static int at91_pm_enter(suspend_state_t state)
200{ 214{
@@ -232,7 +246,7 @@ static int at91_pm_enter(suspend_state_t state)
232 /* copy slow_clock handler to SRAM, and call it */ 246 /* copy slow_clock handler to SRAM, and call it */
233 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); 247 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
234#endif 248#endif
235 slow_clock(); 249 slow_clock(at91_pmc_base, at91_ramc0_base, at91_ramc1_base);
236 break; 250 break;
237 } else { 251 } else {
238 pr_info("AT91: PM - no slow clock mode enabled ...\n"); 252 pr_info("AT91: PM - no slow clock mode enabled ...\n");