diff options
| author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2010-10-22 11:53:39 -0400 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2010-10-26 05:32:48 -0400 |
| commit | 8aeeda822fbfe7da2d4ea391a9757e9532796598 (patch) | |
| tree | 04b001427ac194ad070c7cd6ee89c23af0f125cc /arch/arm/mach-at91/pm.c | |
| parent | bb413db591d53c29292868577068fa822b84da82 (diff) | |
AT91: pm: use plain cpu_do_idle() for "wait for interrupt"
For power management at91_pm_enter() routine, use the cpu_do_idle() for a
rock solid "wait for interrupt" implementation.
For AT91SAM9 ARM 926 based chips, we can exceed the cache line length as
we can access RAM even while in self-refresh mode.
We keep plain access to CP15 for at91rm9200 as this feature is not
available: instructions have to be in a single cache line.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/pm.c')
| -rw-r--r-- | arch/arm/mach-at91/pm.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 615668986480..87a31baf1cb3 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
| @@ -258,16 +258,18 @@ static int at91_pm_enter(suspend_state_t state) | |||
| 258 | * NOTE: the Wait-for-Interrupt instruction needs to be | 258 | * NOTE: the Wait-for-Interrupt instruction needs to be |
| 259 | * in icache so no SDRAM accesses are needed until the | 259 | * in icache so no SDRAM accesses are needed until the |
| 260 | * wakeup IRQ occurs and self-refresh is terminated. | 260 | * wakeup IRQ occurs and self-refresh is terminated. |
| 261 | * For ARM 926 based chips, this requirement is weaker | ||
| 262 | * as at91sam9 can access a RAM in self-refresh mode. | ||
| 261 | */ | 263 | */ |
| 262 | asm("b 1f; .align 5; 1:"); | 264 | asm("b 1f; .align 5; 1:"); |
| 263 | asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ | 265 | asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ |
| 264 | saved_lpr = sdram_selfrefresh_enable(); | 266 | saved_lpr = sdram_selfrefresh_enable(); |
| 265 | asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ | 267 | wait_for_interrupt_enable(); |
| 266 | sdram_selfrefresh_disable(saved_lpr); | 268 | sdram_selfrefresh_disable(saved_lpr); |
| 267 | break; | 269 | break; |
| 268 | 270 | ||
| 269 | case PM_SUSPEND_ON: | 271 | case PM_SUSPEND_ON: |
| 270 | asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ | 272 | cpu_do_idle(); |
| 271 | break; | 273 | break; |
| 272 | 274 | ||
| 273 | default: | 275 | default: |