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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-11-01 13:43:31 -0400
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-11-28 09:50:39 -0500
commitc1c30a29df7e47310caa979dc48f715ae478de5f (patch)
treebea09972cee59473033064e55a649105e86525a7 /arch/arm/mach-at91/include
parentf22deee523e0ff49c3be01dd6f979d374230725a (diff)
ARM: at91: make watchdog drivers soc independent
switch the watchdog drivers to resource and pass it via platform_device Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'arch/arm/mach-at91/include')
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h2
6 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 5ac468c219af..750ba85614ca 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -86,7 +86,6 @@
86#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 86#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
87#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 87#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
88#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 88#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
89#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
90#define AT91_GPBR (cpu_is_at91cap9_revB() ? \ 89#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
91 (0xfffffd50 - AT91_BASE_SYS) : \ 90 (0xfffffd50 - AT91_BASE_SYS) : \
92 (0xfffffd60 - AT91_BASE_SYS)) 91 (0xfffffd60 - AT91_BASE_SYS))
@@ -101,6 +100,7 @@
101#define AT91CAP9_BASE_SHDWC 0xfffffd10 100#define AT91CAP9_BASE_SHDWC 0xfffffd10
102#define AT91CAP9_BASE_RTT 0xfffffd20 101#define AT91CAP9_BASE_RTT 0xfffffd20
103#define AT91CAP9_BASE_PIT 0xfffffd30 102#define AT91CAP9_BASE_PIT 0xfffffd30
103#define AT91CAP9_BASE_WDT 0xfffffd40
104 104
105#define AT91_USART0 AT91CAP9_BASE_US0 105#define AT91_USART0 AT91CAP9_BASE_US0
106#define AT91_USART1 AT91CAP9_BASE_US1 106#define AT91_USART1 AT91CAP9_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index e3c819ab3435..05860c5eb548 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -86,7 +86,6 @@
86#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) 86#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
87#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 87#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
88#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 88#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
89#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
90#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 89#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
91 90
92#define AT91SAM9260_BASE_ECC 0xffffe800 91#define AT91SAM9260_BASE_ECC 0xffffe800
@@ -97,6 +96,7 @@
97#define AT91SAM9260_BASE_SHDWC 0xfffffd10 96#define AT91SAM9260_BASE_SHDWC 0xfffffd10
98#define AT91SAM9260_BASE_RTT 0xfffffd20 97#define AT91SAM9260_BASE_RTT 0xfffffd20
99#define AT91SAM9260_BASE_PIT 0xfffffd30 98#define AT91SAM9260_BASE_PIT 0xfffffd30
99#define AT91SAM9260_BASE_WDT 0xfffffd40
100 100
101#define AT91_USART0 AT91SAM9260_BASE_US0 101#define AT91_USART0 AT91SAM9260_BASE_US0
102#define AT91_USART1 AT91SAM9260_BASE_US1 102#define AT91_USART1 AT91SAM9260_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index f9b516368f96..df2ddfd2d22e 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -71,7 +71,6 @@
71#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) 71#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
72#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 72#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
73#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 73#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
74#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
75#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 74#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
76 75
77#define AT91SAM9261_BASE_SMC 0xffffec00 76#define AT91SAM9261_BASE_SMC 0xffffec00
@@ -81,6 +80,7 @@
81#define AT91SAM9261_BASE_SHDWC 0xfffffd10 80#define AT91SAM9261_BASE_SHDWC 0xfffffd10
82#define AT91SAM9261_BASE_RTT 0xfffffd20 81#define AT91SAM9261_BASE_RTT 0xfffffd20
83#define AT91SAM9261_BASE_PIT 0xfffffd30 82#define AT91SAM9261_BASE_PIT 0xfffffd30
83#define AT91SAM9261_BASE_WDT 0xfffffd40
84 84
85#define AT91_USART0 AT91SAM9261_BASE_US0 85#define AT91_USART0 AT91SAM9261_BASE_US0
86#define AT91_USART1 AT91SAM9261_BASE_US1 86#define AT91_USART1 AT91SAM9261_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 28d52d588e90..0eb614eb2fa6 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -81,7 +81,6 @@
81#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 81#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
82#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 82#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
83#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 83#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
84#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
85#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 84#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
86 85
87#define AT91SAM9263_BASE_ECC0 0xffffe000 86#define AT91SAM9263_BASE_ECC0 0xffffe000
@@ -96,6 +95,7 @@
96#define AT91SAM9263_BASE_SHDWC 0xfffffd10 95#define AT91SAM9263_BASE_SHDWC 0xfffffd10
97#define AT91SAM9263_BASE_RTT0 0xfffffd20 96#define AT91SAM9263_BASE_RTT0 0xfffffd20
98#define AT91SAM9263_BASE_PIT 0xfffffd30 97#define AT91SAM9263_BASE_PIT 0xfffffd30
98#define AT91SAM9263_BASE_WDT 0xfffffd40
99#define AT91SAM9263_BASE_RTT1 0xfffffd50 99#define AT91SAM9263_BASE_RTT1 0xfffffd50
100 100
101#define AT91_USART0 AT91SAM9263_BASE_US0 101#define AT91_USART0 AT91SAM9263_BASE_US0
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 5f3453ef5866..65098c323101 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -93,7 +93,6 @@
93#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) 93#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
94#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 94#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
95#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 95#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
96#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
97#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 96#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
98#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) 97#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS)
99 98
@@ -108,6 +107,7 @@
108#define AT91SAM9G45_BASE_SHDWC 0xfffffd10 107#define AT91SAM9G45_BASE_SHDWC 0xfffffd10
109#define AT91SAM9G45_BASE_RTT 0xfffffd20 108#define AT91SAM9G45_BASE_RTT 0xfffffd20
110#define AT91SAM9G45_BASE_PIT 0xfffffd30 109#define AT91SAM9G45_BASE_PIT 0xfffffd30
110#define AT91SAM9G45_BASE_WDT 0xfffffd40
111 111
112#define AT91_USART0 AT91SAM9G45_BASE_US0 112#define AT91_USART0 AT91SAM9G45_BASE_US0
113#define AT91_USART1 AT91SAM9G45_BASE_US1 113#define AT91_USART1 AT91SAM9G45_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 6f3a4eeb7394..46e136d3ef3f 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -75,7 +75,6 @@
75#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) 75#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
76#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 76#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
77#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 77#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
78#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
79#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) 78#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
80#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 79#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
81#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) 80#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS)
@@ -90,6 +89,7 @@
90#define AT91SAM9RL_BASE_SHDWC 0xfffffd10 89#define AT91SAM9RL_BASE_SHDWC 0xfffffd10
91#define AT91SAM9RL_BASE_RTT 0xfffffd20 90#define AT91SAM9RL_BASE_RTT 0xfffffd20
92#define AT91SAM9RL_BASE_PIT 0xfffffd30 91#define AT91SAM9RL_BASE_PIT 0xfffffd30
92#define AT91SAM9RL_BASE_WDT 0xfffffd40
93 93
94#define AT91_USART0 AT91SAM9RL_BASE_US0 94#define AT91_USART0 AT91SAM9RL_BASE_US0
95#define AT91_USART1 AT91SAM9RL_BASE_US1 95#define AT91_USART1 AT91SAM9RL_BASE_US1