diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-09-17 09:49:36 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2011-11-29 10:46:18 -0500 |
commit | d0fbda9add3281c97205649150fc99fc26148792 (patch) | |
tree | 9e3488936b75252a512bb7e13dedfbbbacf9f363 /arch/arm/mach-at91/include/mach | |
parent | 3285e0ec088febc5a88f57ddd78385a7da71476c (diff) |
ARM: at91/gpio: drop PIN_BASE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach')
-rw-r--r-- | arch/arm/mach-at91/include/mach/gpio.h | 336 |
1 files changed, 167 insertions, 169 deletions
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index 2b9a1f51210f..e3fd225121c7 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h | |||
@@ -16,177 +16,175 @@ | |||
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
18 | 18 | ||
19 | #define PIN_BASE NR_AIC_IRQS | ||
20 | |||
21 | #define MAX_GPIO_BANKS 5 | 19 | #define MAX_GPIO_BANKS 5 |
22 | #define NR_BUILTIN_GPIO (PIN_BASE + (MAX_GPIO_BANKS * 32)) | 20 | #define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32) |
23 | 21 | ||
24 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ | 22 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ |
25 | 23 | ||
26 | #define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) | 24 | #define AT91_PIN_PA0 (0x00 + 0) |
27 | #define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) | 25 | #define AT91_PIN_PA1 (0x00 + 1) |
28 | #define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) | 26 | #define AT91_PIN_PA2 (0x00 + 2) |
29 | #define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) | 27 | #define AT91_PIN_PA3 (0x00 + 3) |
30 | #define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) | 28 | #define AT91_PIN_PA4 (0x00 + 4) |
31 | #define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) | 29 | #define AT91_PIN_PA5 (0x00 + 5) |
32 | #define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) | 30 | #define AT91_PIN_PA6 (0x00 + 6) |
33 | #define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) | 31 | #define AT91_PIN_PA7 (0x00 + 7) |
34 | #define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) | 32 | #define AT91_PIN_PA8 (0x00 + 8) |
35 | #define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) | 33 | #define AT91_PIN_PA9 (0x00 + 9) |
36 | #define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) | 34 | #define AT91_PIN_PA10 (0x00 + 10) |
37 | #define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) | 35 | #define AT91_PIN_PA11 (0x00 + 11) |
38 | #define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) | 36 | #define AT91_PIN_PA12 (0x00 + 12) |
39 | #define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) | 37 | #define AT91_PIN_PA13 (0x00 + 13) |
40 | #define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) | 38 | #define AT91_PIN_PA14 (0x00 + 14) |
41 | #define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) | 39 | #define AT91_PIN_PA15 (0x00 + 15) |
42 | #define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) | 40 | #define AT91_PIN_PA16 (0x00 + 16) |
43 | #define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) | 41 | #define AT91_PIN_PA17 (0x00 + 17) |
44 | #define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) | 42 | #define AT91_PIN_PA18 (0x00 + 18) |
45 | #define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) | 43 | #define AT91_PIN_PA19 (0x00 + 19) |
46 | #define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) | 44 | #define AT91_PIN_PA20 (0x00 + 20) |
47 | #define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) | 45 | #define AT91_PIN_PA21 (0x00 + 21) |
48 | #define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) | 46 | #define AT91_PIN_PA22 (0x00 + 22) |
49 | #define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) | 47 | #define AT91_PIN_PA23 (0x00 + 23) |
50 | #define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) | 48 | #define AT91_PIN_PA24 (0x00 + 24) |
51 | #define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) | 49 | #define AT91_PIN_PA25 (0x00 + 25) |
52 | #define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) | 50 | #define AT91_PIN_PA26 (0x00 + 26) |
53 | #define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) | 51 | #define AT91_PIN_PA27 (0x00 + 27) |
54 | #define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) | 52 | #define AT91_PIN_PA28 (0x00 + 28) |
55 | #define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) | 53 | #define AT91_PIN_PA29 (0x00 + 29) |
56 | #define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) | 54 | #define AT91_PIN_PA30 (0x00 + 30) |
57 | #define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) | 55 | #define AT91_PIN_PA31 (0x00 + 31) |
58 | 56 | ||
59 | #define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) | 57 | #define AT91_PIN_PB0 (0x20 + 0) |
60 | #define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) | 58 | #define AT91_PIN_PB1 (0x20 + 1) |
61 | #define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) | 59 | #define AT91_PIN_PB2 (0x20 + 2) |
62 | #define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) | 60 | #define AT91_PIN_PB3 (0x20 + 3) |
63 | #define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) | 61 | #define AT91_PIN_PB4 (0x20 + 4) |
64 | #define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) | 62 | #define AT91_PIN_PB5 (0x20 + 5) |
65 | #define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) | 63 | #define AT91_PIN_PB6 (0x20 + 6) |
66 | #define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) | 64 | #define AT91_PIN_PB7 (0x20 + 7) |
67 | #define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) | 65 | #define AT91_PIN_PB8 (0x20 + 8) |
68 | #define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) | 66 | #define AT91_PIN_PB9 (0x20 + 9) |
69 | #define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) | 67 | #define AT91_PIN_PB10 (0x20 + 10) |
70 | #define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) | 68 | #define AT91_PIN_PB11 (0x20 + 11) |
71 | #define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) | 69 | #define AT91_PIN_PB12 (0x20 + 12) |
72 | #define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) | 70 | #define AT91_PIN_PB13 (0x20 + 13) |
73 | #define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) | 71 | #define AT91_PIN_PB14 (0x20 + 14) |
74 | #define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) | 72 | #define AT91_PIN_PB15 (0x20 + 15) |
75 | #define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) | 73 | #define AT91_PIN_PB16 (0x20 + 16) |
76 | #define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) | 74 | #define AT91_PIN_PB17 (0x20 + 17) |
77 | #define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) | 75 | #define AT91_PIN_PB18 (0x20 + 18) |
78 | #define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) | 76 | #define AT91_PIN_PB19 (0x20 + 19) |
79 | #define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) | 77 | #define AT91_PIN_PB20 (0x20 + 20) |
80 | #define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) | 78 | #define AT91_PIN_PB21 (0x20 + 21) |
81 | #define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) | 79 | #define AT91_PIN_PB22 (0x20 + 22) |
82 | #define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) | 80 | #define AT91_PIN_PB23 (0x20 + 23) |
83 | #define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) | 81 | #define AT91_PIN_PB24 (0x20 + 24) |
84 | #define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) | 82 | #define AT91_PIN_PB25 (0x20 + 25) |
85 | #define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) | 83 | #define AT91_PIN_PB26 (0x20 + 26) |
86 | #define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) | 84 | #define AT91_PIN_PB27 (0x20 + 27) |
87 | #define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) | 85 | #define AT91_PIN_PB28 (0x20 + 28) |
88 | #define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) | 86 | #define AT91_PIN_PB29 (0x20 + 29) |
89 | #define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) | 87 | #define AT91_PIN_PB30 (0x20 + 30) |
90 | #define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) | 88 | #define AT91_PIN_PB31 (0x20 + 31) |
91 | 89 | ||
92 | #define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) | 90 | #define AT91_PIN_PC0 (0x40 + 0) |
93 | #define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) | 91 | #define AT91_PIN_PC1 (0x40 + 1) |
94 | #define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) | 92 | #define AT91_PIN_PC2 (0x40 + 2) |
95 | #define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) | 93 | #define AT91_PIN_PC3 (0x40 + 3) |
96 | #define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) | 94 | #define AT91_PIN_PC4 (0x40 + 4) |
97 | #define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) | 95 | #define AT91_PIN_PC5 (0x40 + 5) |
98 | #define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) | 96 | #define AT91_PIN_PC6 (0x40 + 6) |
99 | #define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) | 97 | #define AT91_PIN_PC7 (0x40 + 7) |
100 | #define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) | 98 | #define AT91_PIN_PC8 (0x40 + 8) |
101 | #define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) | 99 | #define AT91_PIN_PC9 (0x40 + 9) |
102 | #define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) | 100 | #define AT91_PIN_PC10 (0x40 + 10) |
103 | #define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) | 101 | #define AT91_PIN_PC11 (0x40 + 11) |
104 | #define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) | 102 | #define AT91_PIN_PC12 (0x40 + 12) |
105 | #define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) | 103 | #define AT91_PIN_PC13 (0x40 + 13) |
106 | #define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) | 104 | #define AT91_PIN_PC14 (0x40 + 14) |
107 | #define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) | 105 | #define AT91_PIN_PC15 (0x40 + 15) |
108 | #define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) | 106 | #define AT91_PIN_PC16 (0x40 + 16) |
109 | #define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) | 107 | #define AT91_PIN_PC17 (0x40 + 17) |
110 | #define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) | 108 | #define AT91_PIN_PC18 (0x40 + 18) |
111 | #define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) | 109 | #define AT91_PIN_PC19 (0x40 + 19) |
112 | #define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) | 110 | #define AT91_PIN_PC20 (0x40 + 20) |
113 | #define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) | 111 | #define AT91_PIN_PC21 (0x40 + 21) |
114 | #define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) | 112 | #define AT91_PIN_PC22 (0x40 + 22) |
115 | #define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) | 113 | #define AT91_PIN_PC23 (0x40 + 23) |
116 | #define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) | 114 | #define AT91_PIN_PC24 (0x40 + 24) |
117 | #define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) | 115 | #define AT91_PIN_PC25 (0x40 + 25) |
118 | #define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) | 116 | #define AT91_PIN_PC26 (0x40 + 26) |
119 | #define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) | 117 | #define AT91_PIN_PC27 (0x40 + 27) |
120 | #define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) | 118 | #define AT91_PIN_PC28 (0x40 + 28) |
121 | #define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) | 119 | #define AT91_PIN_PC29 (0x40 + 29) |
122 | #define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) | 120 | #define AT91_PIN_PC30 (0x40 + 30) |
123 | #define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) | 121 | #define AT91_PIN_PC31 (0x40 + 31) |
124 | 122 | ||
125 | #define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) | 123 | #define AT91_PIN_PD0 (0x60 + 0) |
126 | #define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) | 124 | #define AT91_PIN_PD1 (0x60 + 1) |
127 | #define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) | 125 | #define AT91_PIN_PD2 (0x60 + 2) |
128 | #define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) | 126 | #define AT91_PIN_PD3 (0x60 + 3) |
129 | #define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) | 127 | #define AT91_PIN_PD4 (0x60 + 4) |
130 | #define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) | 128 | #define AT91_PIN_PD5 (0x60 + 5) |
131 | #define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) | 129 | #define AT91_PIN_PD6 (0x60 + 6) |
132 | #define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) | 130 | #define AT91_PIN_PD7 (0x60 + 7) |
133 | #define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) | 131 | #define AT91_PIN_PD8 (0x60 + 8) |
134 | #define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) | 132 | #define AT91_PIN_PD9 (0x60 + 9) |
135 | #define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) | 133 | #define AT91_PIN_PD10 (0x60 + 10) |
136 | #define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) | 134 | #define AT91_PIN_PD11 (0x60 + 11) |
137 | #define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) | 135 | #define AT91_PIN_PD12 (0x60 + 12) |
138 | #define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) | 136 | #define AT91_PIN_PD13 (0x60 + 13) |
139 | #define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) | 137 | #define AT91_PIN_PD14 (0x60 + 14) |
140 | #define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) | 138 | #define AT91_PIN_PD15 (0x60 + 15) |
141 | #define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) | 139 | #define AT91_PIN_PD16 (0x60 + 16) |
142 | #define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) | 140 | #define AT91_PIN_PD17 (0x60 + 17) |
143 | #define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) | 141 | #define AT91_PIN_PD18 (0x60 + 18) |
144 | #define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) | 142 | #define AT91_PIN_PD19 (0x60 + 19) |
145 | #define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) | 143 | #define AT91_PIN_PD20 (0x60 + 20) |
146 | #define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) | 144 | #define AT91_PIN_PD21 (0x60 + 21) |
147 | #define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) | 145 | #define AT91_PIN_PD22 (0x60 + 22) |
148 | #define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) | 146 | #define AT91_PIN_PD23 (0x60 + 23) |
149 | #define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) | 147 | #define AT91_PIN_PD24 (0x60 + 24) |
150 | #define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) | 148 | #define AT91_PIN_PD25 (0x60 + 25) |
151 | #define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) | 149 | #define AT91_PIN_PD26 (0x60 + 26) |
152 | #define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) | 150 | #define AT91_PIN_PD27 (0x60 + 27) |
153 | #define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) | 151 | #define AT91_PIN_PD28 (0x60 + 28) |
154 | #define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) | 152 | #define AT91_PIN_PD29 (0x60 + 29) |
155 | #define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) | 153 | #define AT91_PIN_PD30 (0x60 + 30) |
156 | #define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) | 154 | #define AT91_PIN_PD31 (0x60 + 31) |
157 | 155 | ||
158 | #define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) | 156 | #define AT91_PIN_PE0 (0x80 + 0) |
159 | #define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) | 157 | #define AT91_PIN_PE1 (0x80 + 1) |
160 | #define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) | 158 | #define AT91_PIN_PE2 (0x80 + 2) |
161 | #define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) | 159 | #define AT91_PIN_PE3 (0x80 + 3) |
162 | #define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) | 160 | #define AT91_PIN_PE4 (0x80 + 4) |
163 | #define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) | 161 | #define AT91_PIN_PE5 (0x80 + 5) |
164 | #define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) | 162 | #define AT91_PIN_PE6 (0x80 + 6) |
165 | #define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) | 163 | #define AT91_PIN_PE7 (0x80 + 7) |
166 | #define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) | 164 | #define AT91_PIN_PE8 (0x80 + 8) |
167 | #define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) | 165 | #define AT91_PIN_PE9 (0x80 + 9) |
168 | #define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) | 166 | #define AT91_PIN_PE10 (0x80 + 10) |
169 | #define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) | 167 | #define AT91_PIN_PE11 (0x80 + 11) |
170 | #define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) | 168 | #define AT91_PIN_PE12 (0x80 + 12) |
171 | #define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) | 169 | #define AT91_PIN_PE13 (0x80 + 13) |
172 | #define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) | 170 | #define AT91_PIN_PE14 (0x80 + 14) |
173 | #define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) | 171 | #define AT91_PIN_PE15 (0x80 + 15) |
174 | #define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) | 172 | #define AT91_PIN_PE16 (0x80 + 16) |
175 | #define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) | 173 | #define AT91_PIN_PE17 (0x80 + 17) |
176 | #define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) | 174 | #define AT91_PIN_PE18 (0x80 + 18) |
177 | #define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) | 175 | #define AT91_PIN_PE19 (0x80 + 19) |
178 | #define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) | 176 | #define AT91_PIN_PE20 (0x80 + 20) |
179 | #define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) | 177 | #define AT91_PIN_PE21 (0x80 + 21) |
180 | #define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) | 178 | #define AT91_PIN_PE22 (0x80 + 22) |
181 | #define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) | 179 | #define AT91_PIN_PE23 (0x80 + 23) |
182 | #define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) | 180 | #define AT91_PIN_PE24 (0x80 + 24) |
183 | #define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) | 181 | #define AT91_PIN_PE25 (0x80 + 25) |
184 | #define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) | 182 | #define AT91_PIN_PE26 (0x80 + 26) |
185 | #define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) | 183 | #define AT91_PIN_PE27 (0x80 + 27) |
186 | #define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) | 184 | #define AT91_PIN_PE28 (0x80 + 28) |
187 | #define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) | 185 | #define AT91_PIN_PE29 (0x80 + 29) |
188 | #define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) | 186 | #define AT91_PIN_PE30 (0x80 + 30) |
189 | #define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) | 187 | #define AT91_PIN_PE31 (0x80 + 31) |
190 | 188 | ||
191 | #ifndef __ASSEMBLY__ | 189 | #ifndef __ASSEMBLY__ |
192 | /* setup setup routines, called from board init or driver probe() */ | 190 | /* setup setup routines, called from board init or driver probe() */ |
@@ -215,8 +213,8 @@ extern void at91_gpio_resume(void); | |||
215 | 213 | ||
216 | #include <asm/errno.h> | 214 | #include <asm/errno.h> |
217 | 215 | ||
218 | #define gpio_to_irq(gpio) (gpio) | 216 | #define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS) |
219 | #define irq_to_gpio(irq) (irq) | 217 | #define irq_to_gpio(irq) (irq - NR_AIC_IRQS) |
220 | 218 | ||
221 | #endif /* __ASSEMBLY__ */ | 219 | #endif /* __ASSEMBLY__ */ |
222 | 220 | ||