diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-09-17 22:12:00 -0400 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-28 09:50:38 -0500 |
| commit | eab5fd67d6d144ae9877a3de307714836bd1fbf0 (patch) | |
| tree | a945fe40c7212b8dd3d011b548e20d98484e7436 /arch/arm/mach-at91/include/mach/at91sam9261.h | |
| parent | 9627b200eddb7755d62c4c5638c40e476cf61647 (diff) | |
ARM: at91: make rtt register base soc independant
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91sam9261.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9261.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h index 17ae9c73be5e..f84b7132cb79 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261.h | |||
| @@ -73,7 +73,6 @@ | |||
| 73 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 73 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
| 74 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 74 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
| 75 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | 75 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) |
| 76 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
| 77 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | 76 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) |
| 78 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | 77 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) |
| 79 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) | 78 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) |
| @@ -81,6 +80,7 @@ | |||
| 81 | #define AT91SAM9261_BASE_PIOA 0xfffff400 | 80 | #define AT91SAM9261_BASE_PIOA 0xfffff400 |
| 82 | #define AT91SAM9261_BASE_PIOB 0xfffff600 | 81 | #define AT91SAM9261_BASE_PIOB 0xfffff600 |
| 83 | #define AT91SAM9261_BASE_PIOC 0xfffff800 | 82 | #define AT91SAM9261_BASE_PIOC 0xfffff800 |
| 83 | #define AT91SAM9261_BASE_RTT 0xfffffd20 | ||
| 84 | 84 | ||
| 85 | #define AT91_USART0 AT91SAM9261_BASE_US0 | 85 | #define AT91_USART0 AT91SAM9261_BASE_US0 |
| 86 | #define AT91_USART1 AT91SAM9261_BASE_US1 | 86 | #define AT91_USART1 AT91SAM9261_BASE_US1 |