Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (176 commits)
  [ARM] 4795/1: S3C244X: Add armclk and setparent call
  [ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
  [ARM] 4793/1: S3C24XX: Add IRQ->GPIO pin mapping function
  [ARM] 4792/1: S3C24XX: Remove warnings from debug-macro.S
  [ARM] 4791/1: S3C2412: Make fclk a parent of msysclk
  [ARM] 4790/1: S3C2412: Fix parent selection for msysclk.
  [ARM] 4789/1: S3C2412: Add missing CLKDIVN register values
  [ARM] 4788/1: S3C24XX: Fix paramet to s3c2410_dma_ctrl if S3C2410_DMAF_AUTOSTART used.
  [ARM] 4787/1: S3C24XX: s3c2410_dma_request() should return the allocated channel number
  [ARM] 4786/1: S3C2412: Add SPI FIFO controll constants
  [ARM] 4785/1: S3C24XX: Add _SHIFT definitions for S3C2410_BANKCON registers
  [ARM] 4784/1: S3C24XX: Fix GPIO restore glitches
  [ARM] 4783/1: S3C24XX: Add s3c2410_gpio_getpull()
  [ARM] 4782/1: S3C24XX: Define FIQ_START for any FIQ users
  [ARM] 4781/1: S3C24XX: DMA suspend and resume support
  [ARM] 4780/1: S3C2412: Allow for seperate DMA channels for TX and RX
  [ARM] 4779/1: S3C2412: Add s3c2412_gpio_set_sleepcfg() call
  [ARM] 4778/1: S3C2412: Add armclk and init from DVS state
  [ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk
  [ARM] 4775/1: s3c2410: fix compilation error if only s3c2442 cpu is selected
  ...

1 files changed, 62 insertions, 0 deletions

diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index aa2d365c93fb..6aeddd68d8af 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -13,6 +13,8 @@
 #include <linux/errno.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/module.h>
@@ -414,6 +416,66 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 
 /*--------------------------------------------------------------------------*/
 
+#ifdef CONFIG_DEBUG_FS
+
+static int at91_gpio_show(struct seq_file *s, void *unused)
+{
+        int bank, j;
+
+        /* print heading */
+        seq_printf(s, "Pin\t");
+        for (bank = 0; bank < gpio_banks; bank++) {
+                seq_printf(s, "PIO%c\t", 'A' + bank);
+        };
+        seq_printf(s, "\n\n");
+
+        /* print pin status */
+        for (j = 0; j < 32; j++) {
+                seq_printf(s, "%i:\t", j);
+
+                for (bank = 0; bank < gpio_banks; bank++) {
+                        unsigned        pin  = PIN_BASE + (32 * bank) + j;
+                        void __iomem    *pio = pin_to_controller(pin);
+                        unsigned        mask = pin_to_mask(pin);
+
+                        if (__raw_readl(pio + PIO_PSR) & mask)
+                                seq_printf(s, "GPIO:%s", __raw_readl(pio + PIO_PDSR) & mask ? "1" : "0");
+                        else
+                                seq_printf(s, "%s", __raw_readl(pio + PIO_ABSR) & mask ? "B" : "A");
+
+                        seq_printf(s, "\t");
+                }
+
+                seq_printf(s, "\n");
+        }
+
+        return 0;
+}
+
+static int at91_gpio_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, at91_gpio_show, NULL);
+}
+
+static const struct file_operations at91_gpio_operations = {
+        .open           = at91_gpio_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init at91_gpio_debugfs_init(void)
+{
+        /* /sys/kernel/debug/at91_gpio */
+        (void) debugfs_create_file("at91_gpio", S_IFREG | S_IRUGO, NULL, NULL, &at91_gpio_operations);
+        return 0;
+}
+postcore_initcall(at91_gpio_debugfs_init);
+
+#endif
+
+/*--------------------------------------------------------------------------*/
+
 /*
  * Called from the processor-specific init to enable GPIO interrupt support.
  */