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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-11-13 00:00:58 -0500
committerArnd Bergmann <arnd@arndb.de>2011-11-29 10:46:12 -0500
commit619d4a4b40f44c1b45263a0e0c9598e3139a1fec (patch)
tree1cf30395b134a16812a18fb58e47f125920ad29d /arch/arm/mach-at91/gpio.c
parented20178d6266e0b9c9370e6862ac1eadadb8b321 (diff)
ARM: at91: switch gpio clock to clkdev
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/gpio.c')
-rw-r--r--arch/arm/mach-at91/gpio.c23
1 files changed, 15 insertions, 8 deletions
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index cedb753f4cad..4059f07eb955 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -31,6 +31,7 @@ struct at91_gpio_chip {
31 struct at91_gpio_chip *next; /* Bank sharing same clock */ 31 struct at91_gpio_chip *next; /* Bank sharing same clock */
32 struct at91_gpio_bank *bank; /* Bank definition */ 32 struct at91_gpio_bank *bank; /* Bank definition */
33 void __iomem *regbase; /* Base of register bank */ 33 void __iomem *regbase; /* Base of register bank */
34 struct clk *clock; /* associated clock */
34}; 35};
35 36
36#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) 37#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
@@ -58,11 +59,11 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
58 } 59 }
59 60
60static struct at91_gpio_chip gpio_chip[] = { 61static struct at91_gpio_chip gpio_chip[] = {
61 AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), 62 AT91_GPIO_CHIP("pioA", 0x00 + PIN_BASE, 32),
62 AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), 63 AT91_GPIO_CHIP("pioB", 0x20 + PIN_BASE, 32),
63 AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), 64 AT91_GPIO_CHIP("pioC", 0x40 + PIN_BASE, 32),
64 AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), 65 AT91_GPIO_CHIP("pioD", 0x60 + PIN_BASE, 32),
65 AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), 66 AT91_GPIO_CHIP("pioE", 0x80 + PIN_BASE, 32),
66}; 67};
67 68
68static int gpio_banks; 69static int gpio_banks;
@@ -302,7 +303,7 @@ void at91_gpio_suspend(void)
302 __raw_writel(wakeups[i], pio + PIO_IER); 303 __raw_writel(wakeups[i], pio + PIO_IER);
303 304
304 if (!wakeups[i]) 305 if (!wakeups[i])
305 clk_disable(gpio_chip[i].bank->clock); 306 clk_disable(gpio_chip[i].clock);
306 else { 307 else {
307#ifdef CONFIG_PM_DEBUG 308#ifdef CONFIG_PM_DEBUG
308 printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); 309 printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
@@ -319,7 +320,7 @@ void at91_gpio_resume(void)
319 void __iomem *pio = gpio_chip[i].regbase; 320 void __iomem *pio = gpio_chip[i].regbase;
320 321
321 if (!wakeups[i]) 322 if (!wakeups[i])
322 clk_enable(gpio_chip[i].bank->clock); 323 clk_enable(gpio_chip[i].clock);
323 324
324 __raw_writel(wakeups[i], pio + PIO_IDR); 325 __raw_writel(wakeups[i], pio + PIO_IDR);
325 __raw_writel(backups[i], pio + PIO_IER); 326 __raw_writel(backups[i], pio + PIO_IER);
@@ -621,8 +622,14 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
621 continue; 622 continue;
622 } 623 }
623 624
625 at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
626 if (!at91_gpio->clock) {
627 pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i);
628 continue;
629 }
630
624 /* enable PIO controller's clock */ 631 /* enable PIO controller's clock */
625 clk_enable(at91_gpio->bank->clock); 632 clk_enable(at91_gpio->clock);
626 633
627 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ 634 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
628 if (last && last->bank->id == at91_gpio->bank->id) 635 if (last && last->bank->id == at91_gpio->bank->id)