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author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-09-16 20:31:36 -0400 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-09-16 20:31:36 -0400 |
commit | 7ac3c93e5dd74486ca4f8f0b02ae55182658d2e5 (patch) | |
tree | 08b949c872aefbc0f8e12bdcc4dc82297bdd0f2e /arch/arm/mach-at91/clock.c | |
parent | 23666a74c9f552bc9cfef20ded1b8b29bedb80c6 (diff) | |
parent | 5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff) |
Merge 3.6-rc6 into tty-next
This pulls in the fixes in 3.6-rc6
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/mach-at91/clock.c')
-rw-r--r-- | arch/arm/mach-at91/clock.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index de2ec6b8fea7..188c82971ebd 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c | |||
@@ -63,6 +63,12 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); | |||
63 | 63 | ||
64 | #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) | 64 | #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) |
65 | 65 | ||
66 | #define cpu_has_240M_plla() (cpu_is_at91sam9261() \ | ||
67 | || cpu_is_at91sam9263() \ | ||
68 | || cpu_is_at91sam9rl()) | ||
69 | |||
70 | #define cpu_has_210M_plla() (cpu_is_at91sam9260()) | ||
71 | |||
66 | #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ | 72 | #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ |
67 | || cpu_is_at91sam9g45() \ | 73 | || cpu_is_at91sam9g45() \ |
68 | || cpu_is_at91sam9x5() \ | 74 | || cpu_is_at91sam9x5() \ |
@@ -706,6 +712,12 @@ static int __init at91_pmc_init(unsigned long main_clock) | |||
706 | } else if (cpu_has_800M_plla()) { | 712 | } else if (cpu_has_800M_plla()) { |
707 | if (plla.rate_hz > 800000000) | 713 | if (plla.rate_hz > 800000000) |
708 | pll_overclock = true; | 714 | pll_overclock = true; |
715 | } else if (cpu_has_240M_plla()) { | ||
716 | if (plla.rate_hz > 240000000) | ||
717 | pll_overclock = true; | ||
718 | } else if (cpu_has_210M_plla()) { | ||
719 | if (plla.rate_hz > 210000000) | ||
720 | pll_overclock = true; | ||
709 | } else { | 721 | } else { |
710 | if (plla.rate_hz > 209000000) | 722 | if (plla.rate_hz > 209000000) |
711 | pll_overclock = true; | 723 | pll_overclock = true; |