diff options
author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2009-06-26 10:37:00 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-07-02 10:59:54 -0400 |
commit | eab4170865cce9b8898a813b7e8024de857a01da (patch) | |
tree | 78fc6027e6c9b93e631eb451600c78d915aad168 /arch/arm/mach-at91/clock.c | |
parent | 789b23bc40a67d9a19bedc2655c6bcab79bcabd8 (diff) |
[ARM] 5567/1: at91: Support for at91sam9g10: clocks management
From: Hong Xu <hong.xu@atmel.com>
Add the at91sam9g10 support to the AT91 generic clock file. It takes
advantage of the management by functionalities of those PLLs and clocks.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91/clock.c')
-rw-r--r-- | arch/arm/mach-at91/clock.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 6396680271e8..c042dcf4725f 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c | |||
@@ -53,7 +53,7 @@ | |||
53 | #define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \ | 53 | #define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \ |
54 | || cpu_is_at91sam9g45()) | 54 | || cpu_is_at91sam9g45()) |
55 | 55 | ||
56 | #define cpu_has_300M_plla() (0) | 56 | #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) |
57 | 57 | ||
58 | #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ | 58 | #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ |
59 | || cpu_is_at91sam9g45())) | 59 | || cpu_is_at91sam9g45())) |
@@ -626,7 +626,9 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock) | |||
626 | uhpck.pmc_mask = AT91RM9200_PMC_UHP; | 626 | uhpck.pmc_mask = AT91RM9200_PMC_UHP; |
627 | udpck.pmc_mask = AT91RM9200_PMC_UDP; | 627 | udpck.pmc_mask = AT91RM9200_PMC_UDP; |
628 | at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); | 628 | at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); |
629 | } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { | 629 | } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || |
630 | cpu_is_at91sam9263() || cpu_is_at91sam9g20() || | ||
631 | cpu_is_at91sam9g10()) { | ||
630 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; | 632 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; |
631 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; | 633 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; |
632 | } else if (cpu_is_at91cap9()) { | 634 | } else if (cpu_is_at91cap9()) { |