aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-at91/clock.c
diff options
context:
space:
mode:
authorNicolas Ferre <nicolas.ferre@atmel.com>2008-04-08 08:59:18 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-06-02 10:08:13 -0400
commitba45ca435060614e595a107ac323a36b52619d7d (patch)
treea632db8390234591c298a1221b4db2a3b79737b8 /arch/arm/mach-at91/clock.c
parent6b71dbf65e63c13202fb18773a5fd2d4415b6b2e (diff)
[ARM] 4940/1: AT91: UDPHS driver: SAM9RL board and cpu integration.
Adds support for the USB High Speed Device Port on the AT91SAM9RL system on chip. The AT91SAM9RL uses the same UDPHS IP as the AVR32 and the AT91CAP9 (atmel_usba_udc driver). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91/clock.c')
-rw-r--r--arch/arm/mach-at91/clock.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index b87772cd3d32..e8ce8f0f3eda 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -391,8 +391,9 @@ static int at91_clk_show(struct seq_file *s, void *unused)
391 seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR)); 391 seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR));
392 seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR)); 392 seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
393 seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR)); 393 seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
394 seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR)); 394 if (!cpu_is_at91sam9rl())
395 if (cpu_is_at91cap9()) 395 seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
396 if (cpu_is_at91cap9() || cpu_is_at91sam9rl())
396 seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR)); 397 seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR));
397 seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR)); 398 seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
398 seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR)); 399 seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
@@ -610,7 +611,7 @@ int __init at91_clock_init(unsigned long main_clock)
610 /* 611 /*
611 * USB HS clock init 612 * USB HS clock init
612 */ 613 */
613 if (cpu_is_at91cap9()) { 614 if (cpu_is_at91cap9() || cpu_is_at91sam9rl()) {
614 /* 615 /*
615 * multiplier is hard-wired to 40 616 * multiplier is hard-wired to 40
616 * (obtain the USB High Speed 480 MHz when input is 12 MHz) 617 * (obtain the USB High Speed 480 MHz when input is 12 MHz)
@@ -635,7 +636,7 @@ int __init at91_clock_init(unsigned long main_clock)
635 for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++) 636 for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
636 list_add_tail(&standard_pmc_clocks[i]->node, &clocks); 637 list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
637 638
638 if (cpu_is_at91cap9()) 639 if (cpu_is_at91cap9() || cpu_is_at91sam9rl())
639 list_add_tail(&utmi_clk.node, &clocks); 640 list_add_tail(&utmi_clk.node, &clocks);
640 641
641 /* MCK and CPU clock are "always on" */ 642 /* MCK and CPU clock are "always on" */