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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-04-23 03:28:34 -0400
committerArnd Bergmann <arnd@arndb.de>2011-07-28 11:07:28 -0400
commit21d08b9d5536ac418bbce4f419fe2b528b7ddf31 (patch)
treef1a1bbf5645d933799e31d93365458826dfadea6 /arch/arm/mach-at91/at91sam9rl.c
parent02f8c6aee8df3cdc935e9bdd4f2d020306035dbe (diff)
at91: introduce commom AT91_BASE_SYS
On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9rl.c')
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c22
1 files changed, 8 insertions, 14 deletions
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 29dff18ed130..8ff7720b3e4a 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -21,18 +21,10 @@
21#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
22#include <mach/at91_shdwc.h> 22#include <mach/at91_shdwc.h>
23 23
24#include "soc.h"
24#include "generic.h" 25#include "generic.h"
25#include "clock.h" 26#include "clock.h"
26 27
27static struct map_desc at91sam9rl_io_desc[] __initdata = {
28 {
29 .virtual = AT91_VA_BASE_SYS,
30 .pfn = __phys_to_pfn(AT91_BASE_SYS),
31 .length = SZ_16K,
32 .type = MT_DEVICE,
33 },
34};
35
36static struct map_desc at91sam9rl_sram_desc[] __initdata = { 28static struct map_desc at91sam9rl_sram_desc[] __initdata = {
37 { 29 {
38 .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE), 30 .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
@@ -287,13 +279,10 @@ static void at91sam9rl_poweroff(void)
287 * AT91SAM9RL processor initialization 279 * AT91SAM9RL processor initialization
288 * -------------------------------------------------------------------- */ 280 * -------------------------------------------------------------------- */
289 281
290void __init at91sam9rl_map_io(void) 282static void __init at91sam9rl_map_io(void)
291{ 283{
292 unsigned long cidr, sram_size; 284 unsigned long cidr, sram_size;
293 285
294 /* Map peripherals */
295 iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
296
297 cidr = at91_sys_read(AT91_DBGU_CIDR); 286 cidr = at91_sys_read(AT91_DBGU_CIDR);
298 287
299 switch (cidr & AT91_CIDR_SRAMSIZ) { 288 switch (cidr & AT91_CIDR_SRAMSIZ) {
@@ -312,7 +301,7 @@ void __init at91sam9rl_map_io(void)
312 iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); 301 iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
313} 302}
314 303
315void __init at91sam9rl_initialize(unsigned long main_clock) 304static void __init at91sam9rl_initialize(unsigned long main_clock)
316{ 305{
317 at91_arch_reset = at91sam9_alt_reset; 306 at91_arch_reset = at91sam9_alt_reset;
318 pm_power_off = at91sam9rl_poweroff; 307 pm_power_off = at91sam9rl_poweroff;
@@ -381,3 +370,8 @@ void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
381 /* Enable GPIO interrupts */ 370 /* Enable GPIO interrupts */
382 at91_gpio_irq_setup(); 371 at91_gpio_irq_setup();
383} 372}
373
374struct at91_soc __initdata at91sam9rl_soc = {
375 .map_io = at91sam9rl_map_io,
376 .init = at91sam9rl_initialize,
377};