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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-04-23 03:28:34 -0400
committerArnd Bergmann <arnd@arndb.de>2011-07-28 11:07:28 -0400
commit21d08b9d5536ac418bbce4f419fe2b528b7ddf31 (patch)
treef1a1bbf5645d933799e31d93365458826dfadea6 /arch/arm/mach-at91/at91sam9g45.c
parent02f8c6aee8df3cdc935e9bdd4f2d020306035dbe (diff)
at91: introduce commom AT91_BASE_SYS
On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9g45.c')
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 11e214121b23..877c320fce2b 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -22,16 +22,12 @@
22#include <mach/at91_shdwc.h> 22#include <mach/at91_shdwc.h>
23#include <mach/cpu.h> 23#include <mach/cpu.h>
24 24
25#include "soc.h"
25#include "generic.h" 26#include "generic.h"
26#include "clock.h" 27#include "clock.h"
27 28
28static struct map_desc at91sam9g45_io_desc[] __initdata = { 29static struct map_desc at91sam9g45_sram_desc[] __initdata = {
29 { 30 {
30 .virtual = AT91_VA_BASE_SYS,
31 .pfn = __phys_to_pfn(AT91_BASE_SYS),
32 .length = SZ_16K,
33 .type = MT_DEVICE,
34 }, {
35 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G45_SRAM_SIZE, 31 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G45_SRAM_SIZE,
36 .pfn = __phys_to_pfn(AT91SAM9G45_SRAM_BASE), 32 .pfn = __phys_to_pfn(AT91SAM9G45_SRAM_BASE),
37 .length = AT91SAM9G45_SRAM_SIZE, 33 .length = AT91SAM9G45_SRAM_SIZE,
@@ -329,13 +325,12 @@ static void at91sam9g45_poweroff(void)
329 * AT91SAM9G45 processor initialization 325 * AT91SAM9G45 processor initialization
330 * -------------------------------------------------------------------- */ 326 * -------------------------------------------------------------------- */
331 327
332void __init at91sam9g45_map_io(void) 328static void __init at91sam9g45_map_io(void)
333{ 329{
334 /* Map peripherals */ 330 iotable_init(at91sam9g45_sram_desc, ARRAY_SIZE(at91sam9g45_sram_desc));
335 iotable_init(at91sam9g45_io_desc, ARRAY_SIZE(at91sam9g45_io_desc));
336} 331}
337 332
338void __init at91sam9g45_initialize(unsigned long main_clock) 333static void __init at91sam9g45_initialize(unsigned long main_clock)
339{ 334{
340 at91_arch_reset = at91sam9g45_reset; 335 at91_arch_reset = at91sam9g45_reset;
341 pm_power_off = at91sam9g45_poweroff; 336 pm_power_off = at91sam9g45_poweroff;
@@ -404,3 +399,8 @@ void __init at91sam9g45_init_interrupts(unsigned int priority[NR_AIC_IRQS])
404 /* Enable GPIO interrupts */ 399 /* Enable GPIO interrupts */
405 at91_gpio_irq_setup(); 400 at91_gpio_irq_setup();
406} 401}
402
403struct at91_soc __initdata at91sam9g45_soc = {
404 .map_io = at91sam9g45_map_io,
405 .init = at91sam9g45_initialize,
406};