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authorAndrew Victor <andrew@sanpeople.com>2007-02-08 03:42:40 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-08 09:55:24 -0500
commitb2c6561605da4802886cafe96432b8e2968e9edc (patch)
tree46991d838d08e6b7ed4ec3942a1bc7ea70b8280f /arch/arm/mach-at91/at91sam9263_devices.c
parentd0760b3bc8ff9b34e3e2e166e2102548a24751b4 (diff)
[ARM] 4145/2: AT91: Add support for AT91SAM9263 processor
Add support for the Atmel AT91SAM9263 processor. It is similar to the AT91SAM9260 but with more integrated peripherals, 5 GPIO banks, etc. Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9263_devices.c')
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c818
1 files changed, 818 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
new file mode 100644
index 000000000000..d9af7ca58bce
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -0,0 +1,818 @@
1/*
2 * arch/arm/mach-at91/at91sam9263_devices.c
3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/platform_device.h>
16
17#include <asm/arch/board.h>
18#include <asm/arch/gpio.h>
19#include <asm/arch/at91sam9263.h>
20#include <asm/arch/at91sam926x_mc.h>
21#include <asm/arch/at91sam9263_matrix.h>
22
23#include "generic.h"
24
25#define SZ_512 0x00000200
26#define SZ_256 0x00000100
27#define SZ_16 0x00000010
28
29/* --------------------------------------------------------------------
30 * USB Host
31 * -------------------------------------------------------------------- */
32
33#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
34static u64 ohci_dmamask = 0xffffffffUL;
35static struct at91_usbh_data usbh_data;
36
37static struct resource usbh_resources[] = {
38 [0] = {
39 .start = AT91SAM9263_UHP_BASE,
40 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
41 .flags = IORESOURCE_MEM,
42 },
43 [1] = {
44 .start = AT91SAM9263_ID_UHP,
45 .end = AT91SAM9263_ID_UHP,
46 .flags = IORESOURCE_IRQ,
47 },
48};
49
50static struct platform_device at91_usbh_device = {
51 .name = "at91_ohci",
52 .id = -1,
53 .dev = {
54 .dma_mask = &ohci_dmamask,
55 .coherent_dma_mask = 0xffffffff,
56 .platform_data = &usbh_data,
57 },
58 .resource = usbh_resources,
59 .num_resources = ARRAY_SIZE(usbh_resources),
60};
61
62void __init at91_add_device_usbh(struct at91_usbh_data *data)
63{
64 int i;
65
66 if (!data)
67 return;
68
69 /* Enable VBus control for UHP ports */
70 for (i = 0; i < data->ports; i++) {
71 if (data->vbus_pin[i])
72 at91_set_gpio_output(data->vbus_pin[i], 0);
73 }
74
75 usbh_data = *data;
76 platform_device_register(&at91_usbh_device);
77}
78#else
79void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
80#endif
81
82
83/* --------------------------------------------------------------------
84 * USB Device (Gadget)
85 * -------------------------------------------------------------------- */
86
87#ifdef CONFIG_USB_GADGET_AT91
88static struct at91_udc_data udc_data;
89
90static struct resource udc_resources[] = {
91 [0] = {
92 .start = AT91SAM9263_BASE_UDP,
93 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
94 .flags = IORESOURCE_MEM,
95 },
96 [1] = {
97 .start = AT91SAM9263_ID_UDP,
98 .end = AT91SAM9263_ID_UDP,
99 .flags = IORESOURCE_IRQ,
100 },
101};
102
103static struct platform_device at91_udc_device = {
104 .name = "at91_udc",
105 .id = -1,
106 .dev = {
107 .platform_data = &udc_data,
108 },
109 .resource = udc_resources,
110 .num_resources = ARRAY_SIZE(udc_resources),
111};
112
113void __init at91_add_device_udc(struct at91_udc_data *data)
114{
115 if (!data)
116 return;
117
118 if (data->vbus_pin) {
119 at91_set_gpio_input(data->vbus_pin, 0);
120 at91_set_deglitch(data->vbus_pin, 1);
121 }
122
123 /* Pullup pin is handled internally by USB device peripheral */
124
125 udc_data = *data;
126 platform_device_register(&at91_udc_device);
127}
128#else
129void __init at91_add_device_udc(struct at91_udc_data *data) {}
130#endif
131
132
133/* --------------------------------------------------------------------
134 * Ethernet
135 * -------------------------------------------------------------------- */
136
137#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
138static u64 eth_dmamask = 0xffffffffUL;
139static struct at91_eth_data eth_data;
140
141static struct resource eth_resources[] = {
142 [0] = {
143 .start = AT91SAM9263_BASE_EMAC,
144 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
145 .flags = IORESOURCE_MEM,
146 },
147 [1] = {
148 .start = AT91SAM9263_ID_EMAC,
149 .end = AT91SAM9263_ID_EMAC,
150 .flags = IORESOURCE_IRQ,
151 },
152};
153
154static struct platform_device at91sam9263_eth_device = {
155 .name = "macb",
156 .id = -1,
157 .dev = {
158 .dma_mask = &eth_dmamask,
159 .coherent_dma_mask = 0xffffffff,
160 .platform_data = &eth_data,
161 },
162 .resource = eth_resources,
163 .num_resources = ARRAY_SIZE(eth_resources),
164};
165
166void __init at91_add_device_eth(struct at91_eth_data *data)
167{
168 if (!data)
169 return;
170
171 if (data->phy_irq_pin) {
172 at91_set_gpio_input(data->phy_irq_pin, 0);
173 at91_set_deglitch(data->phy_irq_pin, 1);
174 }
175
176 /* Pins used for MII and RMII */
177 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
178 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
179 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
180 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
181 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
182 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
183 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
184 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
185 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
186 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
187
188 if (!data->is_rmii) {
189 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
190 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
191 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
192 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
193 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
194 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
195 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
196 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
197 }
198
199 eth_data = *data;
200 platform_device_register(&at91sam9263_eth_device);
201}
202#else
203void __init at91_add_device_eth(struct at91_eth_data *data) {}
204#endif
205
206
207/* --------------------------------------------------------------------
208 * MMC / SD
209 * -------------------------------------------------------------------- */
210
211#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
212static u64 mmc_dmamask = 0xffffffffUL;
213static struct at91_mmc_data mmc0_data, mmc1_data;
214
215static struct resource mmc0_resources[] = {
216 [0] = {
217 .start = AT91SAM9263_BASE_MCI0,
218 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
219 .flags = IORESOURCE_MEM,
220 },
221 [1] = {
222 .start = AT91SAM9263_ID_MCI0,
223 .end = AT91SAM9263_ID_MCI0,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct platform_device at91sam9263_mmc0_device = {
229 .name = "at91_mci",
230 .id = 0,
231 .dev = {
232 .dma_mask = &mmc_dmamask,
233 .coherent_dma_mask = 0xffffffff,
234 .platform_data = &mmc0_data,
235 },
236 .resource = mmc0_resources,
237 .num_resources = ARRAY_SIZE(mmc0_resources),
238};
239
240static struct resource mmc1_resources[] = {
241 [0] = {
242 .start = AT91SAM9263_BASE_MCI1,
243 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
244 .flags = IORESOURCE_MEM,
245 },
246 [1] = {
247 .start = AT91SAM9263_ID_MCI1,
248 .end = AT91SAM9263_ID_MCI1,
249 .flags = IORESOURCE_IRQ,
250 },
251};
252
253static struct platform_device at91sam9263_mmc1_device = {
254 .name = "at91_mci",
255 .id = 1,
256 .dev = {
257 .dma_mask = &mmc_dmamask,
258 .coherent_dma_mask = 0xffffffff,
259 .platform_data = &mmc1_data,
260 },
261 .resource = mmc1_resources,
262 .num_resources = ARRAY_SIZE(mmc1_resources),
263};
264
265void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
266{
267 if (!data)
268 return;
269
270 /* input/irq */
271 if (data->det_pin) {
272 at91_set_gpio_input(data->det_pin, 1);
273 at91_set_deglitch(data->det_pin, 1);
274 }
275 if (data->wp_pin)
276 at91_set_gpio_input(data->wp_pin, 1);
277 if (data->vcc_pin)
278 at91_set_gpio_output(data->vcc_pin, 0);
279
280 if (mmc_id == 0) { /* MCI0 */
281 /* CLK */
282 at91_set_A_periph(AT91_PIN_PA12, 0);
283
284 if (data->slot_b) {
285 /* CMD */
286 at91_set_A_periph(AT91_PIN_PA16, 1);
287
288 /* DAT0, maybe DAT1..DAT3 */
289 at91_set_A_periph(AT91_PIN_PA17, 1);
290 if (data->wire4) {
291 at91_set_A_periph(AT91_PIN_PA18, 1);
292 at91_set_A_periph(AT91_PIN_PA19, 1);
293 at91_set_A_periph(AT91_PIN_PA20, 1);
294 }
295 } else {
296 /* CMD */
297 at91_set_A_periph(AT91_PIN_PA1, 1);
298
299 /* DAT0, maybe DAT1..DAT3 */
300 at91_set_A_periph(AT91_PIN_PA0, 1);
301 if (data->wire4) {
302 at91_set_A_periph(AT91_PIN_PA3, 1);
303 at91_set_A_periph(AT91_PIN_PA4, 1);
304 at91_set_A_periph(AT91_PIN_PA5, 1);
305 }
306 }
307
308 mmc0_data = *data;
309 at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
310 platform_device_register(&at91sam9263_mmc0_device);
311 } else { /* MCI1 */
312 /* CLK */
313 at91_set_A_periph(AT91_PIN_PA6, 0);
314
315 if (data->slot_b) {
316 /* CMD */
317 at91_set_A_periph(AT91_PIN_PA21, 1);
318
319 /* DAT0, maybe DAT1..DAT3 */
320 at91_set_A_periph(AT91_PIN_PA22, 1);
321 if (data->wire4) {
322 at91_set_A_periph(AT91_PIN_PA23, 1);
323 at91_set_A_periph(AT91_PIN_PA24, 1);
324 at91_set_A_periph(AT91_PIN_PA25, 1);
325 }
326 } else {
327 /* CMD */
328 at91_set_A_periph(AT91_PIN_PA7, 1);
329
330 /* DAT0, maybe DAT1..DAT3 */
331 at91_set_A_periph(AT91_PIN_PA8, 1);
332 if (data->wire4) {
333 at91_set_A_periph(AT91_PIN_PA9, 1);
334 at91_set_A_periph(AT91_PIN_PA10, 1);
335 at91_set_A_periph(AT91_PIN_PA11, 1);
336 }
337 }
338
339 mmc1_data = *data;
340 at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
341 platform_device_register(&at91sam9263_mmc1_device);
342 }
343}
344#else
345void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
346#endif
347
348
349/* --------------------------------------------------------------------
350 * NAND / SmartMedia
351 * -------------------------------------------------------------------- */
352
353#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
354static struct at91_nand_data nand_data;
355
356#define NAND_BASE AT91_CHIPSELECT_3
357
358static struct resource nand_resources[] = {
359 {
360 .start = NAND_BASE,
361 .end = NAND_BASE + SZ_256M - 1,
362 .flags = IORESOURCE_MEM,
363 }
364};
365
366static struct platform_device at91sam9263_nand_device = {
367 .name = "at91_nand",
368 .id = -1,
369 .dev = {
370 .platform_data = &nand_data,
371 },
372 .resource = nand_resources,
373 .num_resources = ARRAY_SIZE(nand_resources),
374};
375
376void __init at91_add_device_nand(struct at91_nand_data *data)
377{
378 unsigned long csa, mode;
379
380 if (!data)
381 return;
382
383 csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
384 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC);
385
386 /* set the bus interface characteristics */
387 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
388 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
389
390 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
391 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
392
393 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
394
395 if (data->bus_width_16)
396 mode = AT91_SMC_DBW_16;
397 else
398 mode = AT91_SMC_DBW_8;
399 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
400
401 /* enable pin */
402 if (data->enable_pin)
403 at91_set_gpio_output(data->enable_pin, 1);
404
405 /* ready/busy pin */
406 if (data->rdy_pin)
407 at91_set_gpio_input(data->rdy_pin, 1);
408
409 /* card detect pin */
410 if (data->det_pin)
411 at91_set_gpio_input(data->det_pin, 1);
412
413 nand_data = *data;
414 platform_device_register(&at91sam9263_nand_device);
415}
416#else
417void __init at91_add_device_nand(struct at91_nand_data *data) {}
418#endif
419
420
421/* --------------------------------------------------------------------
422 * TWI (i2c)
423 * -------------------------------------------------------------------- */
424
425#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
426
427static struct resource twi_resources[] = {
428 [0] = {
429 .start = AT91SAM9263_BASE_TWI,
430 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
431 .flags = IORESOURCE_MEM,
432 },
433 [1] = {
434 .start = AT91SAM9263_ID_TWI,
435 .end = AT91SAM9263_ID_TWI,
436 .flags = IORESOURCE_IRQ,
437 },
438};
439
440static struct platform_device at91sam9263_twi_device = {
441 .name = "at91_i2c",
442 .id = -1,
443 .resource = twi_resources,
444 .num_resources = ARRAY_SIZE(twi_resources),
445};
446
447void __init at91_add_device_i2c(void)
448{
449 /* pins used for TWI interface */
450 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
451 at91_set_multi_drive(AT91_PIN_PB4, 1);
452
453 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
454 at91_set_multi_drive(AT91_PIN_PB5, 1);
455
456 platform_device_register(&at91sam9263_twi_device);
457}
458#else
459void __init at91_add_device_i2c(void) {}
460#endif
461
462
463/* --------------------------------------------------------------------
464 * SPI
465 * -------------------------------------------------------------------- */
466
467#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
468static u64 spi_dmamask = 0xffffffffUL;
469
470static struct resource spi0_resources[] = {
471 [0] = {
472 .start = AT91SAM9263_BASE_SPI0,
473 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
474 .flags = IORESOURCE_MEM,
475 },
476 [1] = {
477 .start = AT91SAM9263_ID_SPI0,
478 .end = AT91SAM9263_ID_SPI0,
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static struct platform_device at91sam9263_spi0_device = {
484 .name = "atmel_spi",
485 .id = 0,
486 .dev = {
487 .dma_mask = &spi_dmamask,
488 .coherent_dma_mask = 0xffffffff,
489 },
490 .resource = spi0_resources,
491 .num_resources = ARRAY_SIZE(spi0_resources),
492};
493
494static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
495
496static struct resource spi1_resources[] = {
497 [0] = {
498 .start = AT91SAM9263_BASE_SPI1,
499 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
500 .flags = IORESOURCE_MEM,
501 },
502 [1] = {
503 .start = AT91SAM9263_ID_SPI1,
504 .end = AT91SAM9263_ID_SPI1,
505 .flags = IORESOURCE_IRQ,
506 },
507};
508
509static struct platform_device at91sam9263_spi1_device = {
510 .name = "atmel_spi",
511 .id = 1,
512 .dev = {
513 .dma_mask = &spi_dmamask,
514 .coherent_dma_mask = 0xffffffff,
515 },
516 .resource = spi1_resources,
517 .num_resources = ARRAY_SIZE(spi1_resources),
518};
519
520static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
521
522void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
523{
524 int i;
525 unsigned long cs_pin;
526 short enable_spi0 = 0;
527 short enable_spi1 = 0;
528
529 /* Choose SPI chip-selects */
530 for (i = 0; i < nr_devices; i++) {
531 if (devices[i].controller_data)
532 cs_pin = (unsigned long) devices[i].controller_data;
533 else if (devices[i].bus_num == 0)
534 cs_pin = spi0_standard_cs[devices[i].chip_select];
535 else
536 cs_pin = spi1_standard_cs[devices[i].chip_select];
537
538 if (devices[i].bus_num == 0)
539 enable_spi0 = 1;
540 else
541 enable_spi1 = 1;
542
543 /* enable chip-select pin */
544 at91_set_gpio_output(cs_pin, 1);
545
546 /* pass chip-select pin to driver */
547 devices[i].controller_data = (void *) cs_pin;
548 }
549
550 spi_register_board_info(devices, nr_devices);
551
552 /* Configure SPI bus(es) */
553 if (enable_spi0) {
554 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
555 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
556 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
557
558 at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
559 platform_device_register(&at91sam9263_spi0_device);
560 }
561 if (enable_spi1) {
562 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
563 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
564 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
565
566 at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
567 platform_device_register(&at91sam9263_spi1_device);
568 }
569}
570#else
571void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
572#endif
573
574
575/* --------------------------------------------------------------------
576 * LEDs
577 * -------------------------------------------------------------------- */
578
579#if defined(CONFIG_LEDS)
580u8 at91_leds_cpu;
581u8 at91_leds_timer;
582
583void __init at91_init_leds(u8 cpu_led, u8 timer_led)
584{
585 /* Enable GPIO to access the LEDs */
586 at91_set_gpio_output(cpu_led, 1);
587 at91_set_gpio_output(timer_led, 1);
588
589 at91_leds_cpu = cpu_led;
590 at91_leds_timer = timer_led;
591}
592#else
593void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
594#endif
595
596
597/* --------------------------------------------------------------------
598 * UART
599 * -------------------------------------------------------------------- */
600
601#if defined(CONFIG_SERIAL_ATMEL)
602
603static struct resource dbgu_resources[] = {
604 [0] = {
605 .start = AT91_VA_BASE_SYS + AT91_DBGU,
606 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
607 .flags = IORESOURCE_MEM,
608 },
609 [1] = {
610 .start = AT91_ID_SYS,
611 .end = AT91_ID_SYS,
612 .flags = IORESOURCE_IRQ,
613 },
614};
615
616static struct atmel_uart_data dbgu_data = {
617 .use_dma_tx = 0,
618 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
619 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
620};
621
622static struct platform_device at91sam9263_dbgu_device = {
623 .name = "atmel_usart",
624 .id = 0,
625 .dev = {
626 .platform_data = &dbgu_data,
627 .coherent_dma_mask = 0xffffffff,
628 },
629 .resource = dbgu_resources,
630 .num_resources = ARRAY_SIZE(dbgu_resources),
631};
632
633static inline void configure_dbgu_pins(void)
634{
635 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
636 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
637}
638
639static struct resource uart0_resources[] = {
640 [0] = {
641 .start = AT91SAM9263_BASE_US0,
642 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
643 .flags = IORESOURCE_MEM,
644 },
645 [1] = {
646 .start = AT91SAM9263_ID_US0,
647 .end = AT91SAM9263_ID_US0,
648 .flags = IORESOURCE_IRQ,
649 },
650};
651
652static struct atmel_uart_data uart0_data = {
653 .use_dma_tx = 1,
654 .use_dma_rx = 1,
655};
656
657static struct platform_device at91sam9263_uart0_device = {
658 .name = "atmel_usart",
659 .id = 1,
660 .dev = {
661 .platform_data = &uart0_data,
662 .coherent_dma_mask = 0xffffffff,
663 },
664 .resource = uart0_resources,
665 .num_resources = ARRAY_SIZE(uart0_resources),
666};
667
668static inline void configure_usart0_pins(void)
669{
670 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
671 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
672 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
673 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
674}
675
676static struct resource uart1_resources[] = {
677 [0] = {
678 .start = AT91SAM9263_BASE_US1,
679 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
680 .flags = IORESOURCE_MEM,
681 },
682 [1] = {
683 .start = AT91SAM9263_ID_US1,
684 .end = AT91SAM9263_ID_US1,
685 .flags = IORESOURCE_IRQ,
686 },
687};
688
689static struct atmel_uart_data uart1_data = {
690 .use_dma_tx = 1,
691 .use_dma_rx = 1,
692};
693
694static struct platform_device at91sam9263_uart1_device = {
695 .name = "atmel_usart",
696 .id = 2,
697 .dev = {
698 .platform_data = &uart1_data,
699 .coherent_dma_mask = 0xffffffff,
700 },
701 .resource = uart1_resources,
702 .num_resources = ARRAY_SIZE(uart1_resources),
703};
704
705static inline void configure_usart1_pins(void)
706{
707 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
708 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
709 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
710 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
711}
712
713static struct resource uart2_resources[] = {
714 [0] = {
715 .start = AT91SAM9263_BASE_US2,
716 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
717 .flags = IORESOURCE_MEM,
718 },
719 [1] = {
720 .start = AT91SAM9263_ID_US2,
721 .end = AT91SAM9263_ID_US2,
722 .flags = IORESOURCE_IRQ,
723 },
724};
725
726static struct atmel_uart_data uart2_data = {
727 .use_dma_tx = 1,
728 .use_dma_rx = 1,
729};
730
731static struct platform_device at91sam9263_uart2_device = {
732 .name = "atmel_usart",
733 .id = 3,
734 .dev = {
735 .platform_data = &uart2_data,
736 .coherent_dma_mask = 0xffffffff,
737 },
738 .resource = uart2_resources,
739 .num_resources = ARRAY_SIZE(uart2_resources),
740};
741
742static inline void configure_usart2_pins(void)
743{
744 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
745 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
746 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
747 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
748}
749
750struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
751struct platform_device *atmel_default_console_device; /* the serial console device */
752
753void __init at91_init_serial(struct at91_uart_config *config)
754{
755 int i;
756
757 /* Fill in list of supported UARTs */
758 for (i = 0; i < config->nr_tty; i++) {
759 switch (config->tty_map[i]) {
760 case 0:
761 configure_usart0_pins();
762 at91_uarts[i] = &at91sam9263_uart0_device;
763 at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart");
764 break;
765 case 1:
766 configure_usart1_pins();
767 at91_uarts[i] = &at91sam9263_uart1_device;
768 at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart");
769 break;
770 case 2:
771 configure_usart2_pins();
772 at91_uarts[i] = &at91sam9263_uart2_device;
773 at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart");
774 break;
775 case 3:
776 configure_dbgu_pins();
777 at91_uarts[i] = &at91sam9263_dbgu_device;
778 at91_clock_associate("mck", &at91sam9263_dbgu_device.dev, "usart");
779 break;
780 default:
781 continue;
782 }
783 at91_uarts[i]->id = i; /* update ID number to mapped ID */
784 }
785
786 /* Set serial console device */
787 if (config->console_tty < ATMEL_MAX_UART)
788 atmel_default_console_device = at91_uarts[config->console_tty];
789 if (!atmel_default_console_device)
790 printk(KERN_INFO "AT91: No default serial console defined.\n");
791}
792
793void __init at91_add_device_serial(void)
794{
795 int i;
796
797 for (i = 0; i < ATMEL_MAX_UART; i++) {
798 if (at91_uarts[i])
799 platform_device_register(at91_uarts[i]);
800 }
801}
802#else
803void __init at91_init_serial(struct at91_uart_config *config) {}
804void __init at91_add_device_serial(void) {}
805#endif
806
807
808/* -------------------------------------------------------------------- */
809/*
810 * These devices are always present and don't need any board-specific
811 * setup.
812 */
813static int __init at91_add_standard_devices(void)
814{
815 return 0;
816}
817
818arch_initcall(at91_add_standard_devices);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 22:59:11 -0500