Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (176 commits)
  [ARM] 4795/1: S3C244X: Add armclk and setparent call
  [ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
  [ARM] 4793/1: S3C24XX: Add IRQ->GPIO pin mapping function
  [ARM] 4792/1: S3C24XX: Remove warnings from debug-macro.S
  [ARM] 4791/1: S3C2412: Make fclk a parent of msysclk
  [ARM] 4790/1: S3C2412: Fix parent selection for msysclk.
  [ARM] 4789/1: S3C2412: Add missing CLKDIVN register values
  [ARM] 4788/1: S3C24XX: Fix paramet to s3c2410_dma_ctrl if S3C2410_DMAF_AUTOSTART used.
  [ARM] 4787/1: S3C24XX: s3c2410_dma_request() should return the allocated channel number
  [ARM] 4786/1: S3C2412: Add SPI FIFO controll constants
  [ARM] 4785/1: S3C24XX: Add _SHIFT definitions for S3C2410_BANKCON registers
  [ARM] 4784/1: S3C24XX: Fix GPIO restore glitches
  [ARM] 4783/1: S3C24XX: Add s3c2410_gpio_getpull()
  [ARM] 4782/1: S3C24XX: Define FIQ_START for any FIQ users
  [ARM] 4781/1: S3C24XX: DMA suspend and resume support
  [ARM] 4780/1: S3C2412: Allow for seperate DMA channels for TX and RX
  [ARM] 4779/1: S3C2412: Add s3c2412_gpio_set_sleepcfg() call
  [ARM] 4778/1: S3C2412: Add armclk and init from DVS state
  [ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk
  [ARM] 4775/1: s3c2410: fix compilation error if only s3c2442 cpu is selected
  ...

1 files changed, 15 insertions, 15 deletions

diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 00e27b177857..a53ba0f74351 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -304,34 +304,34 @@ void __init at91sam9263_initialize(unsigned long main_clock)
 static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
         7,      /* Advanced Interrupt Controller (FIQ) */
         7,      /* System Peripherals */
-        0,      /* Parallel IO Controller A */
-        0,      /* Parallel IO Controller B */
-        0,      /* Parallel IO Controller C, D and E */
+        1,      /* Parallel IO Controller A */
+        1,      /* Parallel IO Controller B */
+        1,      /* Parallel IO Controller C, D and E */
         0,
         0,
-        6,      /* USART 0 */
-        6,      /* USART 1 */
-        6,      /* USART 2 */
+        5,      /* USART 0 */
+        5,      /* USART 1 */
+        5,      /* USART 2 */
         0,      /* Multimedia Card Interface 0 */
         0,      /* Multimedia Card Interface 1 */
-        4,      /* CAN */
-        0,      /* Two-Wire Interface */
-        6,      /* Serial Peripheral Interface 0 */
-        6,      /* Serial Peripheral Interface 1 */
-        5,      /* Serial Synchronous Controller 0 */
-        5,      /* Serial Synchronous Controller 1 */
-        6,      /* AC97 Controller */
+        3,      /* CAN */
+        6,      /* Two-Wire Interface */
+        5,      /* Serial Peripheral Interface 0 */
+        5,      /* Serial Peripheral Interface 1 */
+        4,      /* Serial Synchronous Controller 0 */
+        4,      /* Serial Synchronous Controller 1 */
+        5,      /* AC97 Controller */
         0,      /* Timer Counter 0, 1 and 2 */
         0,      /* Pulse Width Modulation Controller */
         3,      /* Ethernet */
         0,
         0,      /* 2D Graphic Engine */
-        3,      /* USB Device Port */
+        2,      /* USB Device Port */
         0,      /* Image Sensor Interface */
         3,      /* LDC Controller */
         0,      /* DMA Controller */
         0,
-        3,      /* USB Host port */
+        2,      /* USB Host port */
         0,      /* Advanced Interrupt Controller (IRQ0) */
         0,      /* Advanced Interrupt Controller (IRQ1) */
 };