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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-06 16:20:10 -0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-06 16:20:10 -0400 |
commit | c6799ade4ae04b53a5f677e5289116155ff01574 (patch) | |
tree | 3601b5e2387e39d62c207e4268c6cc5c68f2a364 /arch/arm/mach-at91/at91sam9263.c | |
parent | b7405e16435f710edfae6ba32bef4ca20d3de145 (diff) | |
parent | 5cd47155155a32e5b944ac9fc3f3dc578e429aa0 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (82 commits)
[ARM] Add comments marking in-use ptrace numbers
[ARM] Move syscall saving out of the way of utrace
[ARM] 4360/1: S3C24XX: regs-udc.h remove unused macro
[ARM] 4358/1: S3C24XX: mach-qt2410.c: remove linux/mmc/protocol.h header
[ARM] mm 10: allow memory type to be specified with ioremap
[ARM] mm 9: add additional device memory types
[ARM] mm 8: define mem_types table L1 bit 4 to be for ARMv6
[ARM] iop: add missing parens in macro
[ARM] mm 7: remove duplicated __ioremap() prototypes
ARM: OMAP: fix OMAP1 mpuio suspend/resume oops
ARM: OMAP: MPUIO wake updates
ARM: OMAP: speed up gpio irq handling
ARM: OMAP: plat-omap changes for 2430 SDP
ARM: OMAP: gpio object shrinkage, cleanup
ARM: OMAP: /sys/kernel/debug/omap_gpio
ARM: OMAP: Implement workaround for GPIO wakeup bug in OMAP2420 silicon
ARM: OMAP: Enable 24xx GPIO autoidling
[ARM] 4318/2: DSM-G600 Board Support
[ARM] 4227/1: minor head.S fixups
[ARM] 4328/1: Move i.MX UART regs to driver
...
Diffstat (limited to 'arch/arm/mach-at91/at91sam9263.c')
-rw-r--r-- | arch/arm/mach-at91/at91sam9263.c | 48 |
1 files changed, 42 insertions, 6 deletions
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 0e89a7fca3fa..00e27b177857 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -87,6 +87,11 @@ static struct clk mmc1_clk = { | |||
87 | .pmc_mask = 1 << AT91SAM9263_ID_MCI1, | 87 | .pmc_mask = 1 << AT91SAM9263_ID_MCI1, |
88 | .type = CLK_TYPE_PERIPHERAL, | 88 | .type = CLK_TYPE_PERIPHERAL, |
89 | }; | 89 | }; |
90 | static struct clk can_clk = { | ||
91 | .name = "can_clk", | ||
92 | .pmc_mask = 1 << AT91SAM9263_ID_CAN, | ||
93 | .type = CLK_TYPE_PERIPHERAL, | ||
94 | }; | ||
90 | static struct clk twi_clk = { | 95 | static struct clk twi_clk = { |
91 | .name = "twi_clk", | 96 | .name = "twi_clk", |
92 | .pmc_mask = 1 << AT91SAM9263_ID_TWI, | 97 | .pmc_mask = 1 << AT91SAM9263_ID_TWI, |
@@ -102,16 +107,46 @@ static struct clk spi1_clk = { | |||
102 | .pmc_mask = 1 << AT91SAM9263_ID_SPI1, | 107 | .pmc_mask = 1 << AT91SAM9263_ID_SPI1, |
103 | .type = CLK_TYPE_PERIPHERAL, | 108 | .type = CLK_TYPE_PERIPHERAL, |
104 | }; | 109 | }; |
110 | static struct clk ssc0_clk = { | ||
111 | .name = "ssc0_clk", | ||
112 | .pmc_mask = 1 << AT91SAM9263_ID_SSC0, | ||
113 | .type = CLK_TYPE_PERIPHERAL, | ||
114 | }; | ||
115 | static struct clk ssc1_clk = { | ||
116 | .name = "ssc1_clk", | ||
117 | .pmc_mask = 1 << AT91SAM9263_ID_SSC1, | ||
118 | .type = CLK_TYPE_PERIPHERAL, | ||
119 | }; | ||
120 | static struct clk ac97_clk = { | ||
121 | .name = "ac97_clk", | ||
122 | .pmc_mask = 1 << AT91SAM9263_ID_AC97C, | ||
123 | .type = CLK_TYPE_PERIPHERAL, | ||
124 | }; | ||
105 | static struct clk tcb_clk = { | 125 | static struct clk tcb_clk = { |
106 | .name = "tcb_clk", | 126 | .name = "tcb_clk", |
107 | .pmc_mask = 1 << AT91SAM9263_ID_TCB, | 127 | .pmc_mask = 1 << AT91SAM9263_ID_TCB, |
108 | .type = CLK_TYPE_PERIPHERAL, | 128 | .type = CLK_TYPE_PERIPHERAL, |
109 | }; | 129 | }; |
130 | static struct clk pwmc_clk = { | ||
131 | .name = "pwmc_clk", | ||
132 | .pmc_mask = 1 << AT91SAM9263_ID_PWMC, | ||
133 | .type = CLK_TYPE_PERIPHERAL, | ||
134 | }; | ||
110 | static struct clk macb_clk = { | 135 | static struct clk macb_clk = { |
111 | .name = "macb_clk", | 136 | .name = "macb_clk", |
112 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, | 137 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, |
113 | .type = CLK_TYPE_PERIPHERAL, | 138 | .type = CLK_TYPE_PERIPHERAL, |
114 | }; | 139 | }; |
140 | static struct clk dma_clk = { | ||
141 | .name = "dma_clk", | ||
142 | .pmc_mask = 1 << AT91SAM9263_ID_DMA, | ||
143 | .type = CLK_TYPE_PERIPHERAL, | ||
144 | }; | ||
145 | static struct clk twodge_clk = { | ||
146 | .name = "2dge_clk", | ||
147 | .pmc_mask = 1 << AT91SAM9263_ID_2DGE, | ||
148 | .type = CLK_TYPE_PERIPHERAL, | ||
149 | }; | ||
115 | static struct clk udc_clk = { | 150 | static struct clk udc_clk = { |
116 | .name = "udc_clk", | 151 | .name = "udc_clk", |
117 | .pmc_mask = 1 << AT91SAM9263_ID_UDP, | 152 | .pmc_mask = 1 << AT91SAM9263_ID_UDP, |
@@ -142,20 +177,21 @@ static struct clk *periph_clocks[] __initdata = { | |||
142 | &usart2_clk, | 177 | &usart2_clk, |
143 | &mmc0_clk, | 178 | &mmc0_clk, |
144 | &mmc1_clk, | 179 | &mmc1_clk, |
145 | // can | 180 | &can_clk, |
146 | &twi_clk, | 181 | &twi_clk, |
147 | &spi0_clk, | 182 | &spi0_clk, |
148 | &spi1_clk, | 183 | &spi1_clk, |
149 | // ssc0 .. ssc1 | 184 | &ssc0_clk, |
150 | // ac97 | 185 | &ssc1_clk, |
186 | &ac97_clk, | ||
151 | &tcb_clk, | 187 | &tcb_clk, |
152 | // pwmc | 188 | &pwmc_clk, |
153 | &macb_clk, | 189 | &macb_clk, |
154 | // 2dge | 190 | &twodge_clk, |
155 | &udc_clk, | 191 | &udc_clk, |
156 | &isi_clk, | 192 | &isi_clk, |
157 | &lcdc_clk, | 193 | &lcdc_clk, |
158 | // dma | 194 | &dma_clk, |
159 | &ohci_clk, | 195 | &ohci_clk, |
160 | // irq0 .. irq1 | 196 | // irq0 .. irq1 |
161 | }; | 197 | }; |