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authorAndrew Victor <andrew@sanpeople.com>2007-02-05 05:42:07 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-08 09:50:56 -0500
commit9d0412680e6c7b685ee466842047bcfb924d6dc5 (patch)
treec79300964ef1aca5d24571696f95e76b37c14679 /arch/arm/mach-at91/at91sam9261_devices.c
parenta93d48cc6019f84394b31d10c0d830a3b71696be (diff)
[ARM] 4124/1: Rename mach-at91rm9200 and arch-at91rm9200 directories
Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9261_devices.c')
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c741
1 files changed, 741 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
new file mode 100644
index 000000000000..3249de08d1f3
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -0,0 +1,741 @@
1/*
2 * arch/arm/mach-at91/at91sam9261_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13#include <asm/mach/arch.h>
14#include <asm/mach/map.h>
15
16#include <linux/platform_device.h>
17
18#include <asm/arch/board.h>
19#include <asm/arch/gpio.h>
20#include <asm/arch/at91sam9261.h>
21#include <asm/arch/at91sam9261_matrix.h>
22#include <asm/arch/at91sam926x_mc.h>
23
24#include "generic.h"
25
26#define SZ_512 0x00000200
27#define SZ_256 0x00000100
28#define SZ_16 0x00000010
29
30/* --------------------------------------------------------------------
31 * USB Host
32 * -------------------------------------------------------------------- */
33
34#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35static u64 ohci_dmamask = 0xffffffffUL;
36static struct at91_usbh_data usbh_data;
37
38static struct resource usbh_resources[] = {
39 [0] = {
40 .start = AT91SAM9261_UHP_BASE,
41 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
42 .flags = IORESOURCE_MEM,
43 },
44 [1] = {
45 .start = AT91SAM9261_ID_UHP,
46 .end = AT91SAM9261_ID_UHP,
47 .flags = IORESOURCE_IRQ,
48 },
49};
50
51static struct platform_device at91sam9261_usbh_device = {
52 .name = "at91_ohci",
53 .id = -1,
54 .dev = {
55 .dma_mask = &ohci_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 .platform_data = &usbh_data,
58 },
59 .resource = usbh_resources,
60 .num_resources = ARRAY_SIZE(usbh_resources),
61};
62
63void __init at91_add_device_usbh(struct at91_usbh_data *data)
64{
65 if (!data)
66 return;
67
68 usbh_data = *data;
69 platform_device_register(&at91sam9261_usbh_device);
70}
71#else
72void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
73#endif
74
75
76/* --------------------------------------------------------------------
77 * USB Device (Gadget)
78 * -------------------------------------------------------------------- */
79
80#ifdef CONFIG_USB_GADGET_AT91
81static struct at91_udc_data udc_data;
82
83static struct resource udc_resources[] = {
84 [0] = {
85 .start = AT91SAM9261_BASE_UDP,
86 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
87 .flags = IORESOURCE_MEM,
88 },
89 [1] = {
90 .start = AT91SAM9261_ID_UDP,
91 .end = AT91SAM9261_ID_UDP,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96static struct platform_device at91sam9261_udc_device = {
97 .name = "at91_udc",
98 .id = -1,
99 .dev = {
100 .platform_data = &udc_data,
101 },
102 .resource = udc_resources,
103 .num_resources = ARRAY_SIZE(udc_resources),
104};
105
106void __init at91_add_device_udc(struct at91_udc_data *data)
107{
108 unsigned long x;
109
110 if (!data)
111 return;
112
113 if (data->vbus_pin) {
114 at91_set_gpio_input(data->vbus_pin, 0);
115 at91_set_deglitch(data->vbus_pin, 1);
116 }
117
118 /* Pullup pin is handled internally */
119 x = at91_sys_read(AT91_MATRIX_USBPUCR);
120 at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
121
122 udc_data = *data;
123 platform_device_register(&at91sam9261_udc_device);
124}
125#else
126void __init at91_add_device_udc(struct at91_udc_data *data) {}
127#endif
128
129/* --------------------------------------------------------------------
130 * MMC / SD
131 * -------------------------------------------------------------------- */
132
133#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
134static u64 mmc_dmamask = 0xffffffffUL;
135static struct at91_mmc_data mmc_data;
136
137static struct resource mmc_resources[] = {
138 [0] = {
139 .start = AT91SAM9261_BASE_MCI,
140 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
141 .flags = IORESOURCE_MEM,
142 },
143 [1] = {
144 .start = AT91SAM9261_ID_MCI,
145 .end = AT91SAM9261_ID_MCI,
146 .flags = IORESOURCE_IRQ,
147 },
148};
149
150static struct platform_device at91sam9261_mmc_device = {
151 .name = "at91_mci",
152 .id = -1,
153 .dev = {
154 .dma_mask = &mmc_dmamask,
155 .coherent_dma_mask = 0xffffffff,
156 .platform_data = &mmc_data,
157 },
158 .resource = mmc_resources,
159 .num_resources = ARRAY_SIZE(mmc_resources),
160};
161
162void __init at91_add_device_mmc(struct at91_mmc_data *data)
163{
164 if (!data)
165 return;
166
167 /* input/irq */
168 if (data->det_pin) {
169 at91_set_gpio_input(data->det_pin, 1);
170 at91_set_deglitch(data->det_pin, 1);
171 }
172 if (data->wp_pin)
173 at91_set_gpio_input(data->wp_pin, 1);
174 if (data->vcc_pin)
175 at91_set_gpio_output(data->vcc_pin, 0);
176
177 /* CLK */
178 at91_set_B_periph(AT91_PIN_PA2, 0);
179
180 /* CMD */
181 at91_set_B_periph(AT91_PIN_PA1, 1);
182
183 /* DAT0, maybe DAT1..DAT3 */
184 at91_set_B_periph(AT91_PIN_PA0, 1);
185 if (data->wire4) {
186 at91_set_B_periph(AT91_PIN_PA4, 1);
187 at91_set_B_periph(AT91_PIN_PA5, 1);
188 at91_set_B_periph(AT91_PIN_PA6, 1);
189 }
190
191 mmc_data = *data;
192 platform_device_register(&at91sam9261_mmc_device);
193}
194#else
195void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
196#endif
197
198
199/* --------------------------------------------------------------------
200 * NAND / SmartMedia
201 * -------------------------------------------------------------------- */
202
203#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
204static struct at91_nand_data nand_data;
205
206#define NAND_BASE AT91_CHIPSELECT_3
207
208static struct resource nand_resources[] = {
209 {
210 .start = NAND_BASE,
211 .end = NAND_BASE + SZ_256M - 1,
212 .flags = IORESOURCE_MEM,
213 }
214};
215
216static struct platform_device at91_nand_device = {
217 .name = "at91_nand",
218 .id = -1,
219 .dev = {
220 .platform_data = &nand_data,
221 },
222 .resource = nand_resources,
223 .num_resources = ARRAY_SIZE(nand_resources),
224};
225
226void __init at91_add_device_nand(struct at91_nand_data *data)
227{
228 unsigned long csa, mode;
229
230 if (!data)
231 return;
232
233 csa = at91_sys_read(AT91_MATRIX_EBICSA);
234 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
235
236 /* set the bus interface characteristics */
237 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
238 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
239
240 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
241 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
242
243 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
244
245 if (data->bus_width_16)
246 mode = AT91_SMC_DBW_16;
247 else
248 mode = AT91_SMC_DBW_8;
249 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
250
251 /* enable pin */
252 if (data->enable_pin)
253 at91_set_gpio_output(data->enable_pin, 1);
254
255 /* ready/busy pin */
256 if (data->rdy_pin)
257 at91_set_gpio_input(data->rdy_pin, 1);
258
259 /* card detect pin */
260 if (data->det_pin)
261 at91_set_gpio_input(data->det_pin, 1);
262
263 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
264 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
265
266 nand_data = *data;
267 platform_device_register(&at91_nand_device);
268}
269
270#else
271void __init at91_add_device_nand(struct at91_nand_data *data) {}
272#endif
273
274
275/* --------------------------------------------------------------------
276 * TWI (i2c)
277 * -------------------------------------------------------------------- */
278
279#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
280
281static struct resource twi_resources[] = {
282 [0] = {
283 .start = AT91SAM9261_BASE_TWI,
284 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
285 .flags = IORESOURCE_MEM,
286 },
287 [1] = {
288 .start = AT91SAM9261_ID_TWI,
289 .end = AT91SAM9261_ID_TWI,
290 .flags = IORESOURCE_IRQ,
291 },
292};
293
294static struct platform_device at91sam9261_twi_device = {
295 .name = "at91_i2c",
296 .id = -1,
297 .resource = twi_resources,
298 .num_resources = ARRAY_SIZE(twi_resources),
299};
300
301void __init at91_add_device_i2c(void)
302{
303 /* pins used for TWI interface */
304 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
305 at91_set_multi_drive(AT91_PIN_PA7, 1);
306
307 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
308 at91_set_multi_drive(AT91_PIN_PA8, 1);
309
310 platform_device_register(&at91sam9261_twi_device);
311}
312#else
313void __init at91_add_device_i2c(void) {}
314#endif
315
316
317/* --------------------------------------------------------------------
318 * SPI
319 * -------------------------------------------------------------------- */
320
321#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
322static u64 spi_dmamask = 0xffffffffUL;
323
324static struct resource spi0_resources[] = {
325 [0] = {
326 .start = AT91SAM9261_BASE_SPI0,
327 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
328 .flags = IORESOURCE_MEM,
329 },
330 [1] = {
331 .start = AT91SAM9261_ID_SPI0,
332 .end = AT91SAM9261_ID_SPI0,
333 .flags = IORESOURCE_IRQ,
334 },
335};
336
337static struct platform_device at91sam9261_spi0_device = {
338 .name = "atmel_spi",
339 .id = 0,
340 .dev = {
341 .dma_mask = &spi_dmamask,
342 .coherent_dma_mask = 0xffffffff,
343 },
344 .resource = spi0_resources,
345 .num_resources = ARRAY_SIZE(spi0_resources),
346};
347
348static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
349
350static struct resource spi1_resources[] = {
351 [0] = {
352 .start = AT91SAM9261_BASE_SPI1,
353 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
354 .flags = IORESOURCE_MEM,
355 },
356 [1] = {
357 .start = AT91SAM9261_ID_SPI1,
358 .end = AT91SAM9261_ID_SPI1,
359 .flags = IORESOURCE_IRQ,
360 },
361};
362
363static struct platform_device at91sam9261_spi1_device = {
364 .name = "atmel_spi",
365 .id = 1,
366 .dev = {
367 .dma_mask = &spi_dmamask,
368 .coherent_dma_mask = 0xffffffff,
369 },
370 .resource = spi1_resources,
371 .num_resources = ARRAY_SIZE(spi1_resources),
372};
373
374static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
375
376void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
377{
378 int i;
379 unsigned long cs_pin;
380 short enable_spi0 = 0;
381 short enable_spi1 = 0;
382
383 /* Choose SPI chip-selects */
384 for (i = 0; i < nr_devices; i++) {
385 if (devices[i].controller_data)
386 cs_pin = (unsigned long) devices[i].controller_data;
387 else if (devices[i].bus_num == 0)
388 cs_pin = spi0_standard_cs[devices[i].chip_select];
389 else
390 cs_pin = spi1_standard_cs[devices[i].chip_select];
391
392 if (devices[i].bus_num == 0)
393 enable_spi0 = 1;
394 else
395 enable_spi1 = 1;
396
397 /* enable chip-select pin */
398 at91_set_gpio_output(cs_pin, 1);
399
400 /* pass chip-select pin to driver */
401 devices[i].controller_data = (void *) cs_pin;
402 }
403
404 spi_register_board_info(devices, nr_devices);
405
406 /* Configure SPI bus(es) */
407 if (enable_spi0) {
408 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
409 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
410 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
411
412 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
413 platform_device_register(&at91sam9261_spi0_device);
414 }
415 if (enable_spi1) {
416 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
417 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
418 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
419
420 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
421 platform_device_register(&at91sam9261_spi1_device);
422 }
423}
424#else
425void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
426#endif
427
428
429/* --------------------------------------------------------------------
430 * LCD Controller
431 * -------------------------------------------------------------------- */
432
433#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
434static u64 lcdc_dmamask = 0xffffffffUL;
435static struct at91fb_info lcdc_data;
436
437static struct resource lcdc_resources[] = {
438 [0] = {
439 .start = AT91SAM9261_LCDC_BASE,
440 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
441 .flags = IORESOURCE_MEM,
442 },
443 [1] = {
444 .start = AT91SAM9261_ID_LCDC,
445 .end = AT91SAM9261_ID_LCDC,
446 .flags = IORESOURCE_IRQ,
447 },
448#if defined(CONFIG_FB_INTSRAM)
449 [2] = {
450 .start = AT91SAM9261_SRAM_BASE,
451 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
452 .flags = IORESOURCE_MEM,
453 },
454#endif
455};
456
457static struct platform_device at91_lcdc_device = {
458 .name = "at91-fb",
459 .id = 0,
460 .dev = {
461 .dma_mask = &lcdc_dmamask,
462 .coherent_dma_mask = 0xffffffff,
463 .platform_data = &lcdc_data,
464 },
465 .resource = lcdc_resources,
466 .num_resources = ARRAY_SIZE(lcdc_resources),
467};
468
469void __init at91_add_device_lcdc(struct at91fb_info *data)
470{
471 if (!data) {
472 return;
473 }
474
475 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
476 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
477 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
478 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
479 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
480 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
481 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
482 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
483 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
484 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
485 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
486 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
487 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
488 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
489 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
490 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
491 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
492 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
493 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
494 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
495 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
496 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
497
498 lcdc_data = *data;
499 platform_device_register(&at91_lcdc_device);
500}
501#else
502void __init at91_add_device_lcdc(struct at91fb_info *data) {}
503#endif
504
505
506/* --------------------------------------------------------------------
507 * LEDs
508 * -------------------------------------------------------------------- */
509
510#if defined(CONFIG_LEDS)
511u8 at91_leds_cpu;
512u8 at91_leds_timer;
513
514void __init at91_init_leds(u8 cpu_led, u8 timer_led)
515{
516 at91_leds_cpu = cpu_led;
517 at91_leds_timer = timer_led;
518}
519#else
520void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
521#endif
522
523
524/* --------------------------------------------------------------------
525 * UART
526 * -------------------------------------------------------------------- */
527
528#if defined(CONFIG_SERIAL_ATMEL)
529static struct resource dbgu_resources[] = {
530 [0] = {
531 .start = AT91_VA_BASE_SYS + AT91_DBGU,
532 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
533 .flags = IORESOURCE_MEM,
534 },
535 [1] = {
536 .start = AT91_ID_SYS,
537 .end = AT91_ID_SYS,
538 .flags = IORESOURCE_IRQ,
539 },
540};
541
542static struct atmel_uart_data dbgu_data = {
543 .use_dma_tx = 0,
544 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
545 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
546};
547
548static struct platform_device at91sam9261_dbgu_device = {
549 .name = "atmel_usart",
550 .id = 0,
551 .dev = {
552 .platform_data = &dbgu_data,
553 .coherent_dma_mask = 0xffffffff,
554 },
555 .resource = dbgu_resources,
556 .num_resources = ARRAY_SIZE(dbgu_resources),
557};
558
559static inline void configure_dbgu_pins(void)
560{
561 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
562 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
563}
564
565static struct resource uart0_resources[] = {
566 [0] = {
567 .start = AT91SAM9261_BASE_US0,
568 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
569 .flags = IORESOURCE_MEM,
570 },
571 [1] = {
572 .start = AT91SAM9261_ID_US0,
573 .end = AT91SAM9261_ID_US0,
574 .flags = IORESOURCE_IRQ,
575 },
576};
577
578static struct atmel_uart_data uart0_data = {
579 .use_dma_tx = 1,
580 .use_dma_rx = 1,
581};
582
583static struct platform_device at91sam9261_uart0_device = {
584 .name = "atmel_usart",
585 .id = 1,
586 .dev = {
587 .platform_data = &uart0_data,
588 .coherent_dma_mask = 0xffffffff,
589 },
590 .resource = uart0_resources,
591 .num_resources = ARRAY_SIZE(uart0_resources),
592};
593
594static inline void configure_usart0_pins(void)
595{
596 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
597 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
598 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
599 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
600}
601
602static struct resource uart1_resources[] = {
603 [0] = {
604 .start = AT91SAM9261_BASE_US1,
605 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
606 .flags = IORESOURCE_MEM,
607 },
608 [1] = {
609 .start = AT91SAM9261_ID_US1,
610 .end = AT91SAM9261_ID_US1,
611 .flags = IORESOURCE_IRQ,
612 },
613};
614
615static struct atmel_uart_data uart1_data = {
616 .use_dma_tx = 1,
617 .use_dma_rx = 1,
618};
619
620static struct platform_device at91sam9261_uart1_device = {
621 .name = "atmel_usart",
622 .id = 2,
623 .dev = {
624 .platform_data = &uart1_data,
625 .coherent_dma_mask = 0xffffffff,
626 },
627 .resource = uart1_resources,
628 .num_resources = ARRAY_SIZE(uart1_resources),
629};
630
631static inline void configure_usart1_pins(void)
632{
633 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
634 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
635}
636
637static struct resource uart2_resources[] = {
638 [0] = {
639 .start = AT91SAM9261_BASE_US2,
640 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
641 .flags = IORESOURCE_MEM,
642 },
643 [1] = {
644 .start = AT91SAM9261_ID_US2,
645 .end = AT91SAM9261_ID_US2,
646 .flags = IORESOURCE_IRQ,
647 },
648};
649
650static struct atmel_uart_data uart2_data = {
651 .use_dma_tx = 1,
652 .use_dma_rx = 1,
653};
654
655static struct platform_device at91sam9261_uart2_device = {
656 .name = "atmel_usart",
657 .id = 3,
658 .dev = {
659 .platform_data = &uart2_data,
660 .coherent_dma_mask = 0xffffffff,
661 },
662 .resource = uart2_resources,
663 .num_resources = ARRAY_SIZE(uart2_resources),
664};
665
666static inline void configure_usart2_pins(void)
667{
668 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
669 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
670}
671
672struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
673struct platform_device *atmel_default_console_device; /* the serial console device */
674
675void __init at91_init_serial(struct at91_uart_config *config)
676{
677 int i;
678
679 /* Fill in list of supported UARTs */
680 for (i = 0; i < config->nr_tty; i++) {
681 switch (config->tty_map[i]) {
682 case 0:
683 configure_usart0_pins();
684 at91_uarts[i] = &at91sam9261_uart0_device;
685 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
686 break;
687 case 1:
688 configure_usart1_pins();
689 at91_uarts[i] = &at91sam9261_uart1_device;
690 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
691 break;
692 case 2:
693 configure_usart2_pins();
694 at91_uarts[i] = &at91sam9261_uart2_device;
695 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
696 break;
697 case 3:
698 configure_dbgu_pins();
699 at91_uarts[i] = &at91sam9261_dbgu_device;
700 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
701 break;
702 default:
703 continue;
704 }
705 at91_uarts[i]->id = i; /* update ID number to mapped ID */
706 }
707
708 /* Set serial console device */
709 if (config->console_tty < ATMEL_MAX_UART)
710 atmel_default_console_device = at91_uarts[config->console_tty];
711 if (!atmel_default_console_device)
712 printk(KERN_INFO "AT91: No default serial console defined.\n");
713}
714
715void __init at91_add_device_serial(void)
716{
717 int i;
718
719 for (i = 0; i < ATMEL_MAX_UART; i++) {
720 if (at91_uarts[i])
721 platform_device_register(at91_uarts[i]);
722 }
723}
724#else
725void __init at91_init_serial(struct at91_uart_config *config) {}
726void __init at91_add_device_serial(void) {}
727#endif
728
729
730/* -------------------------------------------------------------------- */
731
732/*
733 * These devices are always present and don't need any board-specific
734 * setup.
735 */
736static int __init at91_add_standard_devices(void)
737{
738 return 0;
739}
740
741arch_initcall(at91_add_standard_devices);