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authorAndrew Victor <andrew@sanpeople.com>2007-02-15 02:17:38 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-15 10:33:31 -0500
commitf7eee89b2a4b4c233acde621005a814da0eb46d6 (patch)
tree25474085888884aab2a2a9338dfb0de327d15475 /arch/arm/mach-at91/at91sam9260.c
parent69b2e99cf57ab8121d575a04a050314ac9c8f7e1 (diff)
[ARM] 4192/1: AT91: Support for AT91SAM9XE processors.
Add support for the Atmel AT91SAM9XE range of processors. These are basically AT91SAM9260's with different amounts of internal SRAM and Flash. We make use of the existing AT91SAM9260 support, but just perform run-time detection of the size of the internal SRAM. Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9260.c')
-rw-r--r--arch/arm/mach-at91/at91sam9260.c42
1 files changed, 40 insertions, 2 deletions
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 86e3a4c46550..003c27c2ef65 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -14,6 +14,7 @@
14 14
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/map.h> 16#include <asm/mach/map.h>
17#include <asm/arch/cpu.h>
17#include <asm/arch/at91sam9260.h> 18#include <asm/arch/at91sam9260.h>
18#include <asm/arch/at91_pmc.h> 19#include <asm/arch/at91_pmc.h>
19#include <asm/arch/at91_rstc.h> 20#include <asm/arch/at91_rstc.h>
@@ -27,7 +28,11 @@ static struct map_desc at91sam9260_io_desc[] __initdata = {
27 .pfn = __phys_to_pfn(AT91_BASE_SYS), 28 .pfn = __phys_to_pfn(AT91_BASE_SYS),
28 .length = SZ_16K, 29 .length = SZ_16K,
29 .type = MT_DEVICE, 30 .type = MT_DEVICE,
30 }, { 31 }
32};
33
34static struct map_desc at91sam9260_sram_desc[] __initdata = {
35 {
31 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE, 36 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
32 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE), 37 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
33 .length = AT91SAM9260_SRAM0_SIZE, 38 .length = AT91SAM9260_SRAM0_SIZE,
@@ -37,7 +42,14 @@ static struct map_desc at91sam9260_io_desc[] __initdata = {
37 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE), 42 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
38 .length = AT91SAM9260_SRAM1_SIZE, 43 .length = AT91SAM9260_SRAM1_SIZE,
39 .type = MT_DEVICE, 44 .type = MT_DEVICE,
40 }, 45 }
46};
47
48static struct map_desc at91sam9xe_sram_desc[] __initdata = {
49 {
50 .pfn = __phys_to_pfn(AT91SAM9XE_SRAM_BASE),
51 .type = MT_DEVICE,
52 }
41}; 53};
42 54
43/* -------------------------------------------------------------------- 55/* --------------------------------------------------------------------
@@ -255,11 +267,37 @@ static void at91sam9260_reset(void)
255 * AT91SAM9260 processor initialization 267 * AT91SAM9260 processor initialization
256 * -------------------------------------------------------------------- */ 268 * -------------------------------------------------------------------- */
257 269
270static void __init at91sam9xe_initialize(void)
271{
272 unsigned long cidr, sram_size;
273
274 cidr = at91_sys_read(AT91_DBGU_CIDR);
275
276 switch (cidr & AT91_CIDR_SRAMSIZ) {
277 case AT91_CIDR_SRAMSIZ_32K:
278 sram_size = 2 * SZ_16K;
279 break;
280 case AT91_CIDR_SRAMSIZ_16K:
281 default:
282 sram_size = SZ_16K;
283 }
284
285 at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
286 at91sam9xe_sram_desc->length = sram_size;
287
288 iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
289}
290
258void __init at91sam9260_initialize(unsigned long main_clock) 291void __init at91sam9260_initialize(unsigned long main_clock)
259{ 292{
260 /* Map peripherals */ 293 /* Map peripherals */
261 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc)); 294 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
262 295
296 if (cpu_is_at91sam9xe())
297 at91sam9xe_initialize();
298 else
299 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
300
263 at91_arch_reset = at91sam9260_reset; 301 at91_arch_reset = at91sam9260_reset;
264 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 302 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
265 | (1 << AT91SAM9260_ID_IRQ2); 303 | (1 << AT91SAM9260_ID_IRQ2);