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authorArnd Bergmann <arnd@arndb.de>2012-02-27 12:22:36 -0500
committerArnd Bergmann <arnd@arndb.de>2012-02-29 07:03:08 -0500
commit7eca30aef7961e68ad74c0ef920546c2be7f6579 (patch)
treed7161459a86134bee58b8a0980a15b66839467aa /arch/arm/mach-at91/at91rm9200_devices.c
parentd65b4e98d7ea3038b767b70fe8be959b2913f16d (diff)
parentd5e5a7f987458f42f24a557a0f4e35f94c43fc09 (diff)
Merge branch 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91 into at91/staging/base2+cleanup
* 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91: (20 commits) ARM: at91: properly sort dtb files in Makefile.boot ARM: at91: add at91sam9g25ek.dts in Makefile.boot ARM: at91/board-dt: drop default console Atmel: move console default platform_device to serial driver ARM: at91: merge SRAM Memory banks thanks to mirroring ARM: at91: finally drop at91_sys_read/write ARM: at91/rtc-at91sam9: pass the GPBR to use via resources ARM: at91:rtc/rtc-at91sam9: ioremap register bank ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use ARM: at91/PMC: make register base soc independent ARM: at91/PMC: move assignment out of printf ARM: at91/pm_slowclock: add runtime detection of memory contoller ARM: at91: make sdram/ddr register base soc independent ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h ARM: at91/pm_slowclock: function slow_clock() accepts parameters ARM: at91/pm_slowclock: rename register to named define ARM: at91/ST: remove not needed casts ARM: at91: make ST (System Timer) soc independent ARM: at91: make matrix register base soc independent ARM: at91/at91x40: remove use of at91_sys_read/write Based on top of the at91/9x5, rmk/for-armsoc, at91/device-board, at91/pm_cleanup and at91/base. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-at91/at91rm9200_devices.c')
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 18bacec2b094..640520c04c46 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -21,6 +21,7 @@
21#include <mach/board.h> 21#include <mach/board.h>
22#include <mach/at91rm9200.h> 22#include <mach/at91rm9200.h>
23#include <mach/at91rm9200_mc.h> 23#include <mach/at91rm9200_mc.h>
24#include <mach/at91_ramc.h>
24 25
25#include "generic.h" 26#include "generic.h"
26 27
@@ -241,15 +242,15 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
241 data->chipselect = 4; /* can only use EBI ChipSelect 4 */ 242 data->chipselect = 4; /* can only use EBI ChipSelect 4 */
242 243
243 /* CF takes over CS4, CS5, CS6 */ 244 /* CF takes over CS4, CS5, CS6 */
244 csa = at91_sys_read(AT91_EBI_CSA); 245 csa = at91_ramc_read(0, AT91_EBI_CSA);
245 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH); 246 at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
246 247
247 /* 248 /*
248 * Static memory controller timing adjustments. 249 * Static memory controller timing adjustments.
249 * REVISIT: these timings are in terms of MCK cycles, so 250 * REVISIT: these timings are in terms of MCK cycles, so
250 * when MCK changes (cpufreq etc) so must these values... 251 * when MCK changes (cpufreq etc) so must these values...
251 */ 252 */
252 at91_sys_write(AT91_SMC_CSR(4), 253 at91_ramc_write(0, AT91_SMC_CSR(4),
253 AT91_SMC_ACSS_STD 254 AT91_SMC_ACSS_STD
254 | AT91_SMC_DBW_16 255 | AT91_SMC_DBW_16
255 | AT91_SMC_BAT 256 | AT91_SMC_BAT
@@ -407,11 +408,11 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
407 return; 408 return;
408 409
409 /* enable the address range of CS3 */ 410 /* enable the address range of CS3 */
410 csa = at91_sys_read(AT91_EBI_CSA); 411 csa = at91_ramc_read(0, AT91_EBI_CSA);
411 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA); 412 at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
412 413
413 /* set the bus interface characteristics */ 414 /* set the bus interface characteristics */
414 at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN 415 at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
415 | AT91_SMC_NWS_(5) 416 | AT91_SMC_NWS_(5)
416 | AT91_SMC_TDF_(1) 417 | AT91_SMC_TDF_(1)
417 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */ 418 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
@@ -1114,7 +1115,6 @@ static inline void configure_usart3_pins(unsigned pins)
1114} 1115}
1115 1116
1116static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ 1117static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1117struct platform_device *atmel_default_console_device; /* the serial console device */
1118 1118
1119void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) 1119void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1120{ 1120{