aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/lib
diff options
context:
space:
mode:
authorRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-17 10:51:02 -0400
committerRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-17 10:51:02 -0400
commit684f970e2fd2dc0eb8292500903f54f1ebda0e75 (patch)
treed8736596d79bf95281449f7fe5f72db111eb5a73 /arch/arm/lib
parent652a12ef98d16ccd1ee5cdf2c832ce5411ed3262 (diff)
[PATCH] ARM: bitops
Convert ARM bitop assembly to a macro. All bitops follow the same format, so it's silly duplicating the code when only one or two instructions are different. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/changebit.S11
-rw-r--r--arch/arm/lib/clearbit.S13
-rw-r--r--arch/arm/lib/setbit.S11
-rw-r--r--arch/arm/lib/testchangebit.S15
-rw-r--r--arch/arm/lib/testclearbit.S15
-rw-r--r--arch/arm/lib/testsetbit.S15
6 files changed, 12 insertions, 68 deletions
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
index 3af45cab70e1..389567c24090 100644
--- a/arch/arm/lib/changebit.S
+++ b/arch/arm/lib/changebit.S
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <asm/assembler.h> 11#include <asm/assembler.h>
12#include "bitops.h"
12 .text 13 .text
13 14
14/* Purpose : Function to change a bit 15/* Purpose : Function to change a bit
@@ -17,12 +18,4 @@
17ENTRY(_change_bit_be) 18ENTRY(_change_bit_be)
18 eor r0, r0, #0x18 @ big endian byte ordering 19 eor r0, r0, #0x18 @ big endian byte ordering
19ENTRY(_change_bit_le) 20ENTRY(_change_bit_le)
20 and r2, r0, #7 21 bitop eor
21 mov r3, #1
22 mov r3, r3, lsl r2
23 save_and_disable_irqs ip, r2
24 ldrb r2, [r1, r0, lsr #3]
25 eor r2, r2, r3
26 strb r2, [r1, r0, lsr #3]
27 restore_irqs ip
28 RETINSTR(mov,pc,lr)
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
index 069a2ce413f0..347516533025 100644
--- a/arch/arm/lib/clearbit.S
+++ b/arch/arm/lib/clearbit.S
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <asm/assembler.h> 11#include <asm/assembler.h>
12#include "bitops.h"
12 .text 13 .text
13 14
14/* 15/*
@@ -18,14 +19,4 @@
18ENTRY(_clear_bit_be) 19ENTRY(_clear_bit_be)
19 eor r0, r0, #0x18 @ big endian byte ordering 20 eor r0, r0, #0x18 @ big endian byte ordering
20ENTRY(_clear_bit_le) 21ENTRY(_clear_bit_le)
21 and r2, r0, #7 22 bitop bic
22 mov r3, #1
23 mov r3, r3, lsl r2
24 save_and_disable_irqs ip, r2
25 ldrb r2, [r1, r0, lsr #3]
26 bic r2, r2, r3
27 strb r2, [r1, r0, lsr #3]
28 restore_irqs ip
29 RETINSTR(mov,pc,lr)
30
31
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
index 8f337df5d99b..83bc23d5b037 100644
--- a/arch/arm/lib/setbit.S
+++ b/arch/arm/lib/setbit.S
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <asm/assembler.h> 11#include <asm/assembler.h>
12#include "bitops.h"
12 .text 13 .text
13 14
14/* 15/*
@@ -18,12 +19,4 @@
18ENTRY(_set_bit_be) 19ENTRY(_set_bit_be)
19 eor r0, r0, #0x18 @ big endian byte ordering 20 eor r0, r0, #0x18 @ big endian byte ordering
20ENTRY(_set_bit_le) 21ENTRY(_set_bit_le)
21 and r2, r0, #7 22 bitop orr
22 mov r3, #1
23 mov r3, r3, lsl r2
24 save_and_disable_irqs ip, r2
25 ldrb r2, [r1, r0, lsr #3]
26 orr r2, r2, r3
27 strb r2, [r1, r0, lsr #3]
28 restore_irqs ip
29 RETINSTR(mov,pc,lr)
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index 4aba4676b984..b25dcd2be53e 100644
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -9,21 +9,10 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <asm/assembler.h> 11#include <asm/assembler.h>
12#include "bitops.h"
12 .text 13 .text
13 14
14ENTRY(_test_and_change_bit_be) 15ENTRY(_test_and_change_bit_be)
15 eor r0, r0, #0x18 @ big endian byte ordering 16 eor r0, r0, #0x18 @ big endian byte ordering
16ENTRY(_test_and_change_bit_le) 17ENTRY(_test_and_change_bit_le)
17 add r1, r1, r0, lsr #3 18 testop eor, strb
18 and r3, r0, #7
19 mov r0, #1
20 save_and_disable_irqs ip, r2
21 ldrb r2, [r1]
22 tst r2, r0, lsl r3
23 eor r2, r2, r0, lsl r3
24 strb r2, [r1]
25 restore_irqs ip
26 moveq r0, #0
27 RETINSTR(mov,pc,lr)
28
29
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
index e07c5bd24307..2dcc4b16b68e 100644
--- a/arch/arm/lib/testclearbit.S
+++ b/arch/arm/lib/testclearbit.S
@@ -9,21 +9,10 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <asm/assembler.h> 11#include <asm/assembler.h>
12#include "bitops.h"
12 .text 13 .text
13 14
14ENTRY(_test_and_clear_bit_be) 15ENTRY(_test_and_clear_bit_be)
15 eor r0, r0, #0x18 @ big endian byte ordering 16 eor r0, r0, #0x18 @ big endian byte ordering
16ENTRY(_test_and_clear_bit_le) 17ENTRY(_test_and_clear_bit_le)
17 add r1, r1, r0, lsr #3 @ Get byte offset 18 testop bicne, strneb
18 and r3, r0, #7 @ Get bit offset
19 mov r0, #1
20 save_and_disable_irqs ip, r2
21 ldrb r2, [r1]
22 tst r2, r0, lsl r3
23 bic r2, r2, r0, lsl r3
24 strb r2, [r1]
25 restore_irqs ip
26 moveq r0, #0
27 RETINSTR(mov,pc,lr)
28
29
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
index a570fc74cddd..9011c969761a 100644
--- a/arch/arm/lib/testsetbit.S
+++ b/arch/arm/lib/testsetbit.S
@@ -9,21 +9,10 @@
9 */ 9 */
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <asm/assembler.h> 11#include <asm/assembler.h>
12#include "bitops.h"
12 .text 13 .text
13 14
14ENTRY(_test_and_set_bit_be) 15ENTRY(_test_and_set_bit_be)
15 eor r0, r0, #0x18 @ big endian byte ordering 16 eor r0, r0, #0x18 @ big endian byte ordering
16ENTRY(_test_and_set_bit_le) 17ENTRY(_test_and_set_bit_le)
17 add r1, r1, r0, lsr #3 @ Get byte offset 18 testop orreq, streqb
18 and r3, r0, #7 @ Get bit offset
19 mov r0, #1
20 save_and_disable_irqs ip, r2
21 ldrb r2, [r1]
22 tst r2, r0, lsl r3
23 orr r2, r2, r0, lsl r3
24 strb r2, [r1]
25 restore_irqs ip
26 moveq r0, #0
27 RETINSTR(mov,pc,lr)
28
29