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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-01-16 13:02:17 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-02-02 16:23:25 -0500
commit6323f0ccedf756dfe5f46549cec69a2d6d97937b (patch)
tree091e3408c12bbce33ef5d708b6131132b9660d4d /arch/arm/lib
parenta16ede35a2659170c855c5d267776666c0630f1f (diff)
ARM: bitops: switch set/clear/change bitops to use ldrex/strex
Switch the set/clear/change bitops to use the word-based exclusive operations, which are only present in a wider range of ARM architectures than the byte-based exclusive operations. Tested record: - Nicolas Pitre: ext3,rw,le - Sourav Poddar: nfs,le - Will Deacon: ext3,rw,le - Tony Lindgren: ext3+nfs,le Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Will Deacon <will.deacon@arm.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/bitops.h38
-rw-r--r--arch/arm/lib/changebit.S10
-rw-r--r--arch/arm/lib/clearbit.S11
-rw-r--r--arch/arm/lib/setbit.S11
-rw-r--r--arch/arm/lib/testchangebit.S9
-rw-r--r--arch/arm/lib/testclearbit.S9
-rw-r--r--arch/arm/lib/testsetbit.S9
7 files changed, 35 insertions, 62 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index bd00551fb797..a9d9d152a751 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -1,15 +1,15 @@
1 1#if __LINUX_ARM_ARCH__ >= 6
2#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_32v6K)
3 .macro bitop, instr 2 .macro bitop, instr
4 ands ip, r1, #3 3 ands ip, r1, #3
5 strneb r1, [ip] @ assert word-aligned 4 strneb r1, [ip] @ assert word-aligned
6 mov r2, #1 5 mov r2, #1
7 and r3, r0, #7 @ Get bit offset 6 and r3, r0, #31 @ Get bit offset
8 add r1, r1, r0, lsr #3 @ Get byte offset 7 mov r0, r0, lsr #5
8 add r1, r1, r0, lsl #2 @ Get word offset
9 mov r3, r2, lsl r3 9 mov r3, r2, lsl r3
101: ldrexb r2, [r1] 101: ldrex r2, [r1]
11 \instr r2, r2, r3 11 \instr r2, r2, r3
12 strexb r0, r2, [r1] 12 strex r0, r2, [r1]
13 cmp r0, #0 13 cmp r0, #0
14 bne 1b 14 bne 1b
15 mov pc, lr 15 mov pc, lr
@@ -18,15 +18,16 @@
18 .macro testop, instr, store 18 .macro testop, instr, store
19 ands ip, r1, #3 19 ands ip, r1, #3
20 strneb r1, [ip] @ assert word-aligned 20 strneb r1, [ip] @ assert word-aligned
21 and r3, r0, #7 @ Get bit offset
22 mov r2, #1 21 mov r2, #1
23 add r1, r1, r0, lsr #3 @ Get byte offset 22 and r3, r0, #31 @ Get bit offset
23 mov r0, r0, lsr #5
24 add r1, r1, r0, lsl #2 @ Get word offset
24 mov r3, r2, lsl r3 @ create mask 25 mov r3, r2, lsl r3 @ create mask
25 smp_dmb 26 smp_dmb
261: ldrexb r2, [r1] 271: ldrex r2, [r1]
27 ands r0, r2, r3 @ save old value of bit 28 ands r0, r2, r3 @ save old value of bit
28 \instr r2, r2, r3 @ toggle bit 29 \instr r2, r2, r3 @ toggle bit
29 strexb ip, r2, [r1] 30 strex ip, r2, [r1]
30 cmp ip, #0 31 cmp ip, #0
31 bne 1b 32 bne 1b
32 smp_dmb 33 smp_dmb
@@ -38,13 +39,14 @@
38 .macro bitop, instr 39 .macro bitop, instr
39 ands ip, r1, #3 40 ands ip, r1, #3
40 strneb r1, [ip] @ assert word-aligned 41 strneb r1, [ip] @ assert word-aligned
41 and r2, r0, #7 42 and r2, r0, #31
43 mov r0, r0, lsr #5
42 mov r3, #1 44 mov r3, #1
43 mov r3, r3, lsl r2 45 mov r3, r3, lsl r2
44 save_and_disable_irqs ip 46 save_and_disable_irqs ip
45 ldrb r2, [r1, r0, lsr #3] 47 ldr r2, [r1, r0, lsl #2]
46 \instr r2, r2, r3 48 \instr r2, r2, r3
47 strb r2, [r1, r0, lsr #3] 49 str r2, [r1, r0, lsl #2]
48 restore_irqs ip 50 restore_irqs ip
49 mov pc, lr 51 mov pc, lr
50 .endm 52 .endm
@@ -60,11 +62,11 @@
60 .macro testop, instr, store 62 .macro testop, instr, store
61 ands ip, r1, #3 63 ands ip, r1, #3
62 strneb r1, [ip] @ assert word-aligned 64 strneb r1, [ip] @ assert word-aligned
63 add r1, r1, r0, lsr #3 65 and r3, r0, #31
64 and r3, r0, #7 66 mov r0, r0, lsr #5
65 mov r0, #1
66 save_and_disable_irqs ip 67 save_and_disable_irqs ip
67 ldrb r2, [r1] 68 ldr r2, [r1, r0, lsl #2]!
69 mov r0, #1
68 tst r2, r0, lsl r3 70 tst r2, r0, lsl r3
69 \instr r2, r2, r0, lsl r3 71 \instr r2, r2, r0, lsl r3
70 \store r2, [r1] 72 \store r2, [r1]
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
index 80f3115cbee2..68ed5b62e839 100644
--- a/arch/arm/lib/changebit.S
+++ b/arch/arm/lib/changebit.S
@@ -12,12 +12,6 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15/* Purpose : Function to change a bit 15ENTRY(_change_bit)
16 * Prototype: int change_bit(int bit, void *addr)
17 */
18ENTRY(_change_bit_be)
19 eor r0, r0, #0x18 @ big endian byte ordering
20ENTRY(_change_bit_le)
21 bitop eor 16 bitop eor
22ENDPROC(_change_bit_be) 17ENDPROC(_change_bit)
23ENDPROC(_change_bit_le)
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
index 1a63e43a1df0..4c04c3b51eeb 100644
--- a/arch/arm/lib/clearbit.S
+++ b/arch/arm/lib/clearbit.S
@@ -12,13 +12,6 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15/* 15ENTRY(_clear_bit)
16 * Purpose : Function to clear a bit
17 * Prototype: int clear_bit(int bit, void *addr)
18 */
19ENTRY(_clear_bit_be)
20 eor r0, r0, #0x18 @ big endian byte ordering
21ENTRY(_clear_bit_le)
22 bitop bic 16 bitop bic
23ENDPROC(_clear_bit_be) 17ENDPROC(_clear_bit)
24ENDPROC(_clear_bit_le)
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
index 1dd7176c4b2b..bbee5c66a23e 100644
--- a/arch/arm/lib/setbit.S
+++ b/arch/arm/lib/setbit.S
@@ -12,13 +12,6 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15/* 15ENTRY(_set_bit)
16 * Purpose : Function to set a bit
17 * Prototype: int set_bit(int bit, void *addr)
18 */
19ENTRY(_set_bit_be)
20 eor r0, r0, #0x18 @ big endian byte ordering
21ENTRY(_set_bit_le)
22 bitop orr 16 bitop orr
23ENDPROC(_set_bit_be) 17ENDPROC(_set_bit)
24ENDPROC(_set_bit_le)
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index 5c98dc567f0f..15a4d431f229 100644
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -12,9 +12,6 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_test_and_change_bit_be) 15ENTRY(_test_and_change_bit)
16 eor r0, r0, #0x18 @ big endian byte ordering 16 testop eor, str
17ENTRY(_test_and_change_bit_le) 17ENDPROC(_test_and_change_bit)
18 testop eor, strb
19ENDPROC(_test_and_change_bit_be)
20ENDPROC(_test_and_change_bit_le)
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
index 543d7094d18e..521b66b5b95d 100644
--- a/arch/arm/lib/testclearbit.S
+++ b/arch/arm/lib/testclearbit.S
@@ -12,9 +12,6 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_test_and_clear_bit_be) 15ENTRY(_test_and_clear_bit)
16 eor r0, r0, #0x18 @ big endian byte ordering 16 testop bicne, strne
17ENTRY(_test_and_clear_bit_le) 17ENDPROC(_test_and_clear_bit)
18 testop bicne, strneb
19ENDPROC(_test_and_clear_bit_be)
20ENDPROC(_test_and_clear_bit_le)
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
index 0b3f390401ce..1c98cc2185bb 100644
--- a/arch/arm/lib/testsetbit.S
+++ b/arch/arm/lib/testsetbit.S
@@ -12,9 +12,6 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_test_and_set_bit_be) 15ENTRY(_test_and_set_bit)
16 eor r0, r0, #0x18 @ big endian byte ordering 16 testop orreq, streq
17ENTRY(_test_and_set_bit_le) 17ENDPROC(_test_and_set_bit)
18 testop orreq, streqb
19ENDPROC(_test_and_set_bit_be)
20ENDPROC(_test_and_set_bit_le)