Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (91 commits) ARM: 6806/1: irq: introduce entry and exit functions for chained handlers ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas ARM: 6747/1: P2V: Thumb2 support ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9 ARM: 6772/1: errata: possible fault MMU translations following an ASID switch ARM: 6776/1: mach-ux500: activate fix for errata 753970 ARM: 6794/1: SPEAr: Append UL to device address macros. ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files. ARM: 6681/1: SPEAr: add debugfs support to clk API ARM: 6703/1: SPEAr: update clk API support ARM: 6679/1: SPEAr: make clk API functions more generic ARM: 6737/1: SPEAr: formalized timer support ...
author: Linus Torvalds <torvalds@linux-foundation.org> 2011-03-16 22:03:06 -0400
committer: Linus Torvalds <torvalds@linux-foundation.org> 2011-03-16 22:03:06 -0400
commit: 16d8775700f1815076f879719ce14b33f50a3171 (patch)
tree: 8525e6e6f12b6acf7cf2746853cc65549f3dbf4c /arch/arm/lib
parent: e34551339a195aa548eaf698523714a8fe7f1984 (diff)
parent: 05e34754518b6a90d5c392790c032575fab12d66 (diff)
7 files changed, 45 insertions, 64 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index d42252918bfb..10d868a5a481 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -1,44 +1,52 @@
+#if __LINUX_ARM_ARCH__ >= 6
-#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_32v6K)
        .macro  bitop, instr
+        ands    ip, r1, #3
+        strneb  r1, [ip]                @ assert word-aligned
        mov     r2, #1
-        and     r3, r0, #7              @ Get bit offset
+        and     r3, r0, #31             @ Get bit offset
-        add     r1, r1, r0, lsr #3      @ Get byte offset
+        mov     r0, r0, lsr #5
+        add     r1, r1, r0, lsl #2      @ Get word offset
        mov     r3, r2, lsl r3
-1:      ldrexb  r2, [r1]
+1:      ldrex   r2, [r1]
        \instr  r2, r2, r3
-        strexb  r0, r2, [r1]
+        strex   r0, r2, [r1]
        cmp     r0, #0
        bne     1b
-        mov     pc, lr
+        bx      lr
        .endm
        .macro  testop, instr, store
-        and     r3, r0, #7              @ Get bit offset
+        ands    ip, r1, #3
+        strneb  r1, [ip]                @ assert word-aligned
        mov     r2, #1
-        add     r1, r1, r0, lsr #3      @ Get byte offset
+        and     r3, r0, #31             @ Get bit offset
+        mov     r0, r0, lsr #5
+        add     r1, r1, r0, lsl #2      @ Get word offset
        mov     r3, r2, lsl r3          @ create mask
        smp_dmb
-1:      ldrexb  r2, [r1]
+1:      ldrex   r2, [r1]
        ands    r0, r2, r3              @ save old value of bit
-        \instr  r2, r2, r3                      @ toggle bit
+        \instr  r2, r2, r3              @ toggle bit
-        strexb  ip, r2, [r1]
+        strex   ip, r2, [r1]
        cmp     ip, #0
        bne     1b
        smp_dmb
        cmp     r0, #0
        movne   r0, #1
-2:      mov     pc, lr
+2:      bx      lr
        .endm
 #else
        .macro  bitop, instr
-        and     r2, r0, #7
+        ands    ip, r1, #3
+        strneb  r1, [ip]                @ assert word-aligned
+        and     r2, r0, #31
+        mov     r0, r0, lsr #5
        mov     r3, #1
        mov     r3, r3, lsl r2
        save_and_disable_irqs ip
-        ldrb    r2, [r1, r0, lsr #3]
+        ldr     r2, [r1, r0, lsl #2]
        \instr  r2, r2, r3
-        strb    r2, [r1, r0, lsr #3]
+        str     r2, [r1, r0, lsl #2]
        restore_irqs ip
        mov     pc, lr
        .endm
@@ -52,11 +60,13 @@
 * to avoid dirtying the data cache.
 */
        .macro  testop, instr, store
-        add     r1, r1, r0, lsr #3
+        ands    ip, r1, #3
-        and     r3, r0, #7
+        strneb  r1, [ip]                @ assert word-aligned
-        mov     r0, #1
+        and     r3, r0, #31
+        mov     r0, r0, lsr #5
        save_and_disable_irqs ip
-        ldrb    r2, [r1]
+        ldr     r2, [r1, r0, lsl #2]!
+        mov     r0, #1
        tst     r2, r0, lsl r3
        \instr  r2, r2, r0, lsl r3
        \store  r2, [r1]
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
index 80f3115cbee2..68ed5b62e839 100644
--- a/arch/arm/lib/changebit.S
+++ b/arch/arm/lib/changebit.S
@@ -12,12 +12,6 @@
 #include "bitops.h"
                .text
-/* Purpose  : Function to change a bit
+ENTRY(_change_bit)
- * Prototype: int change_bit(int bit, void *addr)
- */
-ENTRY(_change_bit_be)
-                eor     r0, r0, #0x18           @ big endian byte ordering
-ENTRY(_change_bit_le)
        bitop   eor
-ENDPROC(_change_bit_be)
+ENDPROC(_change_bit)
-ENDPROC(_change_bit_le)
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
index 1a63e43a1df0..4c04c3b51eeb 100644
--- a/arch/arm/lib/clearbit.S
+++ b/arch/arm/lib/clearbit.S
@@ -12,13 +12,6 @@
 #include "bitops.h"
                .text
-/*
+ENTRY(_clear_bit)
- * Purpose  : Function to clear a bit
- * Prototype: int clear_bit(int bit, void *addr)
- */
-ENTRY(_clear_bit_be)
-                eor     r0, r0, #0x18           @ big endian byte ordering
-ENTRY(_clear_bit_le)
        bitop   bic
-ENDPROC(_clear_bit_be)
+ENDPROC(_clear_bit)
-ENDPROC(_clear_bit_le)
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
index 1dd7176c4b2b..bbee5c66a23e 100644
--- a/arch/arm/lib/setbit.S
+++ b/arch/arm/lib/setbit.S
@@ -12,13 +12,6 @@
 #include "bitops.h"
                .text
-/*
+ENTRY(_set_bit)
- * Purpose  : Function to set a bit
- * Prototype: int set_bit(int bit, void *addr)
- */
-ENTRY(_set_bit_be)
-                eor     r0, r0, #0x18           @ big endian byte ordering
-ENTRY(_set_bit_le)
        bitop   orr
-ENDPROC(_set_bit_be)
+ENDPROC(_set_bit)
-ENDPROC(_set_bit_le)
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index 5c98dc567f0f..15a4d431f229 100644
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -12,9 +12,6 @@
 #include "bitops.h"
                .text
-ENTRY(_test_and_change_bit_be)
+ENTRY(_test_and_change_bit)
-                eor     r0, r0, #0x18           @ big endian byte ordering
+        testop  eor, str
-ENTRY(_test_and_change_bit_le)
+ENDPROC(_test_and_change_bit)
-        testop  eor, strb
-ENDPROC(_test_and_change_bit_be)
-ENDPROC(_test_and_change_bit_le)
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
index 543d7094d18e..521b66b5b95d 100644
--- a/arch/arm/lib/testclearbit.S
+++ b/arch/arm/lib/testclearbit.S
@@ -12,9 +12,6 @@
 #include "bitops.h"
                .text
-ENTRY(_test_and_clear_bit_be)
+ENTRY(_test_and_clear_bit)
-                eor     r0, r0, #0x18           @ big endian byte ordering
+        testop  bicne, strne
-ENTRY(_test_and_clear_bit_le)
+ENDPROC(_test_and_clear_bit)
-        testop  bicne, strneb
-ENDPROC(_test_and_clear_bit_be)
-ENDPROC(_test_and_clear_bit_le)
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
index 0b3f390401ce..1c98cc2185bb 100644
--- a/arch/arm/lib/testsetbit.S
+++ b/arch/arm/lib/testsetbit.S
@@ -12,9 +12,6 @@
 #include "bitops.h"
                .text
-ENTRY(_test_and_set_bit_be)
+ENTRY(_test_and_set_bit)
-                eor     r0, r0, #0x18           @ big endian byte ordering
+        testop  orreq, streq
-ENTRY(_test_and_set_bit_le)
+ENDPROC(_test_and_set_bit)
-        testop  orreq, streqb
-ENDPROC(_test_and_set_bit_be)
-ENDPROC(_test_and_set_bit_le)
author	Linus Torvalds <torvalds@linux-foundation.org>	2011-03-16 22:03:06 -0400
committer	Linus Torvalds <torvalds@linux-foundation.org>	2011-03-16 22:03:06 -0400
commit	16d8775700f1815076f879719ce14b33f50a3171 (patch)
tree	8525e6e6f12b6acf7cf2746853cc65549f3dbf4c /arch/arm/lib
parent	e34551339a195aa548eaf698523714a8fe7f1984 (diff)
parent	05e34754518b6a90d5c392790c032575fab12d66 (diff)

diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index d42252918bfb..10d868a5a481 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h
@@ -1,44 +1,52 @@
1		1	#if __LINUX_ARM_ARCH__ >= 6
2	#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_32v6K)
3	.macro bitop, instr	2	.macro bitop, instr
		3	ands ip, r1, #3
		4	strneb r1, [ip] @ assert word-aligned
4	mov r2, #1	5	mov r2, #1
5	and r3, r0, #7 @ Get bit offset	6	and r3, r0, #31 @ Get bit offset
6	add r1, r1, r0, lsr #3 @ Get byte offset	7	mov r0, r0, lsr #5
		8	add r1, r1, r0, lsl #2 @ Get word offset
7	mov r3, r2, lsl r3	9	mov r3, r2, lsl r3
8	1: ldrexb r2, [r1]	10	1: ldrex r2, [r1]
9	\instr r2, r2, r3	11	\instr r2, r2, r3
10	strexb r0, r2, [r1]	12	strex r0, r2, [r1]
11	cmp r0, #0	13	cmp r0, #0
12	bne 1b	14	bne 1b
13	mov pc, lr	15	bx lr
14	.endm	16	.endm
15		17
16	.macro testop, instr, store	18	.macro testop, instr, store
17	and r3, r0, #7 @ Get bit offset	19	ands ip, r1, #3
		20	strneb r1, [ip] @ assert word-aligned
18	mov r2, #1	21	mov r2, #1
19	add r1, r1, r0, lsr #3 @ Get byte offset	22	and r3, r0, #31 @ Get bit offset
		23	mov r0, r0, lsr #5
		24	add r1, r1, r0, lsl #2 @ Get word offset
20	mov r3, r2, lsl r3 @ create mask	25	mov r3, r2, lsl r3 @ create mask
21	smp_dmb	26	smp_dmb
22	1: ldrexb r2, [r1]	27	1: ldrex r2, [r1]
23	ands r0, r2, r3 @ save old value of bit	28	ands r0, r2, r3 @ save old value of bit
24	\instr r2, r2, r3 @ toggle bit	29	\instr r2, r2, r3 @ toggle bit
25	strexb ip, r2, [r1]	30	strex ip, r2, [r1]
26	cmp ip, #0	31	cmp ip, #0
27	bne 1b	32	bne 1b
28	smp_dmb	33	smp_dmb
29	cmp r0, #0	34	cmp r0, #0
30	movne r0, #1	35	movne r0, #1
31	2: mov pc, lr	36	2: bx lr
32	.endm	37	.endm
33	#else	38	#else
34	.macro bitop, instr	39	.macro bitop, instr
35	and r2, r0, #7	40	ands ip, r1, #3
		41	strneb r1, [ip] @ assert word-aligned
		42	and r2, r0, #31
		43	mov r0, r0, lsr #5
36	mov r3, #1	44	mov r3, #1
37	mov r3, r3, lsl r2	45	mov r3, r3, lsl r2
38	save_and_disable_irqs ip	46	save_and_disable_irqs ip
39	ldrb r2, [r1, r0, lsr #3]	47	ldr r2, [r1, r0, lsl #2]
40	\instr r2, r2, r3	48	\instr r2, r2, r3
41	strb r2, [r1, r0, lsr #3]	49	str r2, [r1, r0, lsl #2]
42	restore_irqs ip	50	restore_irqs ip
43	mov pc, lr	51	mov pc, lr
44	.endm	52	.endm
@@ -52,11 +60,13 @@
52	* to avoid dirtying the data cache.	60	* to avoid dirtying the data cache.
53	*/	61	*/
54	.macro testop, instr, store	62	.macro testop, instr, store
55	add r1, r1, r0, lsr #3	63	ands ip, r1, #3
56	and r3, r0, #7	64	strneb r1, [ip] @ assert word-aligned
57	mov r0, #1	65	and r3, r0, #31
		66	mov r0, r0, lsr #5
58	save_and_disable_irqs ip	67	save_and_disable_irqs ip
59	ldrb r2, [r1]	68	ldr r2, [r1, r0, lsl #2]!
		69	mov r0, #1
60	tst r2, r0, lsl r3	70	tst r2, r0, lsl r3
61	\instr r2, r2, r0, lsl r3	71	\instr r2, r2, r0, lsl r3
62	\store r2, [r1]	72	\store r2, [r1]


diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S index 80f3115cbee2..68ed5b62e839 100644 --- a/arch/arm/lib/changebit.S +++ b/arch/arm/lib/changebit.S
@@ -12,12 +12,6 @@
12	#include "bitops.h"	12	#include "bitops.h"
13	.text	13	.text
14		14
15	/* Purpose : Function to change a bit	15	ENTRY(_change_bit)
16	* Prototype: int change_bit(int bit, void *addr)
17	*/
18	ENTRY(_change_bit_be)
19	eor r0, r0, #0x18 @ big endian byte ordering
20	ENTRY(_change_bit_le)
21	bitop eor	16	bitop eor
22	ENDPROC(_change_bit_be)	17	ENDPROC(_change_bit)
23	ENDPROC(_change_bit_le)


diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S index 1a63e43a1df0..4c04c3b51eeb 100644 --- a/arch/arm/lib/clearbit.S +++ b/arch/arm/lib/clearbit.S
@@ -12,13 +12,6 @@
12	#include "bitops.h"	12	#include "bitops.h"
13	.text	13	.text
14		14
15	/*	15	ENTRY(_clear_bit)
16	* Purpose : Function to clear a bit
17	* Prototype: int clear_bit(int bit, void *addr)
18	*/
19	ENTRY(_clear_bit_be)
20	eor r0, r0, #0x18 @ big endian byte ordering
21	ENTRY(_clear_bit_le)
22	bitop bic	16	bitop bic
23	ENDPROC(_clear_bit_be)	17	ENDPROC(_clear_bit)
24	ENDPROC(_clear_bit_le)


diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S index 1dd7176c4b2b..bbee5c66a23e 100644 --- a/arch/arm/lib/setbit.S +++ b/arch/arm/lib/setbit.S
@@ -12,13 +12,6 @@
12	#include "bitops.h"	12	#include "bitops.h"
13	.text	13	.text
14		14
15	/*	15	ENTRY(_set_bit)
16	* Purpose : Function to set a bit
17	* Prototype: int set_bit(int bit, void *addr)
18	*/
19	ENTRY(_set_bit_be)
20	eor r0, r0, #0x18 @ big endian byte ordering
21	ENTRY(_set_bit_le)
22	bitop orr	16	bitop orr
23	ENDPROC(_set_bit_be)	17	ENDPROC(_set_bit)
24	ENDPROC(_set_bit_le)


diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S index 5c98dc567f0f..15a4d431f229 100644 --- a/arch/arm/lib/testchangebit.S +++ b/arch/arm/lib/testchangebit.S
@@ -12,9 +12,6 @@
12	#include "bitops.h"	12	#include "bitops.h"
13	.text	13	.text
14		14
15	ENTRY(_test_and_change_bit_be)	15	ENTRY(_test_and_change_bit)
16	eor r0, r0, #0x18 @ big endian byte ordering	16	testop eor, str
17	ENTRY(_test_and_change_bit_le)	17	ENDPROC(_test_and_change_bit)
18	testop eor, strb
19	ENDPROC(_test_and_change_bit_be)
20	ENDPROC(_test_and_change_bit_le)


diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S index 543d7094d18e..521b66b5b95d 100644 --- a/arch/arm/lib/testclearbit.S +++ b/arch/arm/lib/testclearbit.S
@@ -12,9 +12,6 @@
12	#include "bitops.h"	12	#include "bitops.h"
13	.text	13	.text
14		14
15	ENTRY(_test_and_clear_bit_be)	15	ENTRY(_test_and_clear_bit)
16	eor r0, r0, #0x18 @ big endian byte ordering	16	testop bicne, strne
17	ENTRY(_test_and_clear_bit_le)	17	ENDPROC(_test_and_clear_bit)
18	testop bicne, strneb
19	ENDPROC(_test_and_clear_bit_be)
20	ENDPROC(_test_and_clear_bit_le)


diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S index 0b3f390401ce..1c98cc2185bb 100644 --- a/arch/arm/lib/testsetbit.S +++ b/arch/arm/lib/testsetbit.S
@@ -12,9 +12,6 @@
12	#include "bitops.h"	12	#include "bitops.h"
13	.text	13	.text
14		14
15	ENTRY(_test_and_set_bit_be)	15	ENTRY(_test_and_set_bit)
16	eor r0, r0, #0x18 @ big endian byte ordering	16	testop orreq, streq
17	ENTRY(_test_and_set_bit_le)	17	ENDPROC(_test_and_set_bit)
18	testop orreq, streqb
19	ENDPROC(_test_and_set_bit_be)
20	ENDPROC(_test_and_set_bit_le)