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authorLinus Torvalds <torvalds@linux-foundation.org>2008-07-14 19:06:58 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-07-14 19:06:58 -0400
commit85082fd7cbe3173198aac0eb5e85ab1edcc6352c (patch)
treeedbc09b7945994f78668d218fa02e991c3b3b365 /arch/arm/lib/memset.S
parent666484f0250db2e016948d63b3ef33e202e3b8d0 (diff)
parent53ffe3b440aa85af6fc4eda09b2d44bcdd312d4d (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (241 commits) [ARM] 5171/1: ep93xx: fix compilation of modules using clocks [ARM] 5133/2: at91sam9g20 defconfig file [ARM] 5130/4: Support for the at91sam9g20 [ARM] 5160/1: IOP3XX: gpio/gpiolib support [ARM] at91: Fix NAND FLASH timings for at91sam9x evaluation kits. [ARM] 5084/1: zylonite: Register AC97 device [ARM] 5085/2: PXA: Move AC97 over to the new central device declaration model [ARM] 5120/1: pxa: correct platform driver names for PXA25x and PXA27x UDC drivers [ARM] 5147/1: pxaficp_ir: drop pxa_gpio_mode calls, as pin setting [ARM] 5145/1: PXA2xx: provide api to control IrDA pins state [ARM] 5144/1: pxaficp_ir: cleanup includes [ARM] pxa: remove pxa_set_cken() [ARM] pxa: allow clk aliases [ARM] Feroceon: don't disable BPU on boot [ARM] Orion: LED support for HP mv2120 [ARM] Orion: add RD88F5181L-FXO support [ARM] Orion: add RD88F5181L-GE support [ARM] Orion: add Netgear WNR854T support [ARM] s3c2410_defconfig: update for current build [ARM] Acer n30: Minor style and indentation fixes. ...
Diffstat (limited to 'arch/arm/lib/memset.S')
-rw-r--r--arch/arm/lib/memset.S46
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 95b110b07a89..b477d4ac88ef 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -39,6 +39,9 @@ ENTRY(memset)
39 mov r3, r1 39 mov r3, r1
40 cmp r2, #16 40 cmp r2, #16
41 blt 4f 41 blt 4f
42
43#if ! CALGN(1)+0
44
42/* 45/*
43 * We need an extra register for this loop - save the return address and 46 * We need an extra register for this loop - save the return address and
44 * use the LR 47 * use the LR
@@ -64,6 +67,49 @@ ENTRY(memset)
64 stmneia r0!, {r1, r3, ip, lr} 67 stmneia r0!, {r1, r3, ip, lr}
65 ldr lr, [sp], #4 68 ldr lr, [sp], #4
66 69
70#else
71
72/*
73 * This version aligns the destination pointer in order to write
74 * whole cache lines at once.
75 */
76
77 stmfd sp!, {r4-r7, lr}
78 mov r4, r1
79 mov r5, r1
80 mov r6, r1
81 mov r7, r1
82 mov ip, r1
83 mov lr, r1
84
85 cmp r2, #96
86 tstgt r0, #31
87 ble 3f
88
89 and ip, r0, #31
90 rsb ip, ip, #32
91 sub r2, r2, ip
92 movs ip, ip, lsl #(32 - 4)
93 stmcsia r0!, {r4, r5, r6, r7}
94 stmmiia r0!, {r4, r5}
95 tst ip, #(1 << 30)
96 mov ip, r1
97 strne r1, [r0], #4
98
993: subs r2, r2, #64
100 stmgeia r0!, {r1, r3-r7, ip, lr}
101 stmgeia r0!, {r1, r3-r7, ip, lr}
102 bgt 3b
103 ldmeqfd sp!, {r4-r7, pc}
104
105 tst r2, #32
106 stmneia r0!, {r1, r3-r7, ip, lr}
107 tst r2, #16
108 stmneia r0!, {r4-r7}
109 ldmfd sp!, {r4-r7, lr}
110
111#endif
112
674: tst r2, #8 1134: tst r2, #8
68 stmneia r0!, {r1, r3} 114 stmneia r0!, {r1, r3}
69 tst r2, #4 115 tst r2, #4