[ARM] 2947/1: copy template with new memcpy/memmove

Patch from Nicolas Pitre

This patch provides a new implementation for optimized memory copy
functions on ARM.  It is made of two levels: a template that consists of
the core copy code and separate files that define macros to be used with
the core code depending on the type of copy needed. This allows for best
performances while sharing the same core for implementing memcpy(),
copy_from_user() and copy_to_user() for instance.

Two reasons for this work:

1) the current copy_to_user/copy_from_user implementation assumes no
   task switch will ever occur in the middle of each copied page making
   it completely unsafe with CONFIG_PREEMPT=y.

2) current copy implementations are measurably suboptimal and optimizing
   different implementations separately is a pain and more opportunities
   for bugs.

The reason for (1) is the fact that copy inside user pages are performed
with the ldm instruction which has no mean for testing user protections
and could possibly race with process preemption bypassing the COW mechanism
for example.  This is a longstanding issue that we said ought to be fixed
for about two years now.  The solution is to substitute those ldm insns
with a series of ldrt or strt insns to enforce user memory protection.
At least on StrongARM and XScale cores the ldm is not faster than the
equivalent ldr/str insns with a warm i-cache so there is no measurable
performance degradation with that change. The fact that the copy code is
a template makes it pretty easy to reuse the same core code as for memcpy
and benefit from the same performance optimizations.

Now (2) is best demonstrated with actual throughput measurements.
First, here is a summary of memcopy tests performed on a StrongARM core:

	PTR alignment	buffer size	kernel version	this version
	------------------------------------------------------------
	  aligned	     32		 59.73		107.43
	unaligned	     32		 61.31		 74.72
	  aligned	    100		132.47		136.15
	unaligned	    100	    	103.84		123.76
	  aligned	   4096		130.67		130.80
	unaligned	   4096	    	130.68		130.64
	  aligned	1048576		 68.03		68.18
	unaligned	1048576		 68.03		68.18

The buffer size is in bytes and the measured speed in MB/s.  The copy
was performed repeatedly with given buffer and throughput averaged over
3 seconds.

Here we can see that the current kernel version has a higher entry cost
that shows up with small buffers.  As buffer size grows both implementation
converge to the same throughput.

Now here's the exact same test performed on an XScale core (PXA255):

	PTR alignment	buffer size	kernel version	this version
	------------------------------------------------------------
	  aligned	     32		 46.99		 77.58
	unaligned	     32		 53.61		 59.59
	  aligned	    100		107.19		136.59
	unaligned	    100		 83.61		 97.58
	  aligned	   4096		129.13		129.98
	unaligned	   4096		128.36		128.53
	  aligned	1048576		 53.76		 59.41
	unaligned	1048576		 33.67		 56.96

Again we can see the entry setup cost being higher for the current kernel
before getting to the main copy loop.  Then throughput results converge
as long as the buffer remains in the cache. Then the 1MB case shows more
differences probably due to better pld placement and/or less instruction
interlocks in this proposed implementation.

Disclaimer: The PXA system was running with slower clocks than the
StrongARM system so trying to infer any conclusion by comparing those
separate sets of results side by side would be completely inappropriate.

So...  What this patch does is to replace both memcpy and memmove with
an implementation based on the provided copy code template.  The memmove
code is kept separate since it is used only if the memory areas involved
do overlap in which case the code is a transposition of the template but
with the copy occurring in the opposite direction (trying to fit that
mode into the template turned it into a mess not worth it for memmove
alone).  And obviously both memcpy and memmove were tested with all kinds
of pointer alignments and buffer sizes to exercise all code paths for
correctness.

The next patch will provide the now trivial replacement implementation
copy_to_user and copy_from_user.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 206 insertions, 0 deletions

diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S
new file mode 100644
index 000000000000..ef7fddc14ac9
--- /dev/null
+++ b/arch/arm/lib/memmove.S
@@ -0,0 +1,206 @@
+/*
+ *  linux/arch/arm/lib/memmove.S
+ *
+ *  Author:     Nicolas Pitre
+ *  Created:    Sep 28, 2005
+ *  Copyright:  (C) MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+/*
+ * This can be used to enable code to cacheline align the source pointer.
+ * Experiments on tested architectures (StrongARM and XScale) didn't show
+ * this a worthwhile thing to do.  That might be different in the future.
+ */
+//#define CALGN(code...)        code
+#define CALGN(code...)
+
+                .text
+
+/*
+ * Prototype: void *memmove(void *dest, const void *src, size_t n);
+ *
+ * Note:
+ *
+ * If the memory regions don't overlap, we simply branch to memcpy which is
+ * normally a bit faster. Otherwise the copy is done going downwards.  This
+ * is a transposition of the code from copy_template.S but with the copy
+ * occurring in the opposite direction.
+ */
+
+ENTRY(memmove)
+
+                subs    ip, r0, r1
+                cmphi   r2, ip
+                bls     memcpy
+
+                stmfd   sp!, {r0, r4, lr}
+                add     r1, r1, r2
+                add     r0, r0, r2
+                subs    r2, r2, #4
+                blt     8f
+                ands    ip, r0, #3
+        PLD(    pld     [r1, #-4]               )
+                bne     9f
+                ands    ip, r1, #3
+                bne     10f
+
+1:              subs    r2, r2, #(28)
+                stmfd   sp!, {r5 - r8}
+                blt     5f
+
+        CALGN(  ands    ip, r1, #31             )
+        CALGN(  sbcnes  r4, ip, r2              )  @ C is always set here
+        CALGN(  bcs     2f                      )
+        CALGN(  adr     r4, 6f                  )
+        CALGN(  subs    r2, r2, ip              )  @ C is set here
+        CALGN(  add     pc, r4, ip              )
+
+        PLD(    pld     [r1, #-4]               )
+2:      PLD(    subs    r2, r2, #96             )
+        PLD(    pld     [r1, #-32]              )
+        PLD(    blt     4f                      )
+        PLD(    pld     [r1, #-64]              )
+        PLD(    pld     [r1, #-96]              )
+
+3:      PLD(    pld     [r1, #-128]             )
+4:              ldmdb   r1!, {r3, r4, r5, r6, r7, r8, ip, lr}
+                subs    r2, r2, #32
+                stmdb   r0!, {r3, r4, r5, r6, r7, r8, ip, lr}
+                bge     3b
+        PLD(    cmn     r2, #96                 )
+        PLD(    bge     4b                      )
+
+5:              ands    ip, r2, #28
+                rsb     ip, ip, #32
+                addne   pc, pc, ip              @ C is always clear here
+                b       7f
+6:              nop
+                ldr     r3, [r1, #-4]!
+                ldr     r4, [r1, #-4]!
+                ldr     r5, [r1, #-4]!
+                ldr     r6, [r1, #-4]!
+                ldr     r7, [r1, #-4]!
+                ldr     r8, [r1, #-4]!
+                ldr     lr, [r1, #-4]!
+
+                add     pc, pc, ip
+                nop
+                nop
+                str     r3, [r0, #-4]!
+                str     r4, [r0, #-4]!
+                str     r5, [r0, #-4]!
+                str     r6, [r0, #-4]!
+                str     r7, [r0, #-4]!
+                str     r8, [r0, #-4]!
+                str     lr, [r0, #-4]!
+
+        CALGN(  bcs     2b                      )
+
+7:              ldmfd   sp!, {r5 - r8}
+
+8:              movs    r2, r2, lsl #31
+                ldrneb  r3, [r1, #-1]!
+                ldrcsb  r4, [r1, #-1]!
+                ldrcsb  ip, [r1, #-1]
+                strneb  r3, [r0, #-1]!
+                strcsb  r4, [r0, #-1]!
+                strcsb  ip, [r0, #-1]
+                ldmfd   sp!, {r0, r4, pc}
+
+9:              cmp     ip, #2
+                ldrgtb  r3, [r1, #-1]!
+                ldrgeb  r4, [r1, #-1]!
+                ldrb    lr, [r1, #-1]!
+                strgtb  r3, [r0, #-1]!
+                strgeb  r4, [r0, #-1]!
+                subs    r2, r2, ip
+                strb    lr, [r0, #-1]!
+                blt     8b
+                ands    ip, r1, #3
+                beq     1b
+
+10:             bic     r1, r1, #3
+                cmp     ip, #2
+                ldr     r3, [r1, #0]
+                beq     17f
+                blt     18f
+
+
+                .macro  backward_copy_shift push pull
+
+                subs    r2, r2, #28
+                blt     14f
+
+        CALGN(  ands    ip, r1, #31             )
+        CALGN(  rsb     ip, ip, #32             )
+        CALGN(  sbcnes  r4, ip, r2              )  @ C is always set here
+        CALGN(  subcc   r2, r2, ip              )
+        CALGN(  bcc     15f                     )
+
+11:             stmfd   sp!, {r5 - r9}
+
+        PLD(    pld     [r1, #-4]               )
+        PLD(    subs    r2, r2, #96             )
+        PLD(    pld     [r1, #-32]              )
+        PLD(    blt     13f                     )
+        PLD(    pld     [r1, #-64]              )
+        PLD(    pld     [r1, #-96]              )
+
+12:     PLD(    pld     [r1, #-128]             )
+13:             ldmdb   r1!, {r7, r8, r9, ip}
+                mov     lr, r3, push #\push
+                subs    r2, r2, #32
+                ldmdb   r1!, {r3, r4, r5, r6}
+                orr     lr, lr, ip, pull #\pull
+                mov     ip, ip, push #\push
+                orr     ip, ip, r9, pull #\pull
+                mov     r9, r9, push #\push
+                orr     r9, r9, r8, pull #\pull
+                mov     r8, r8, push #\push
+                orr     r8, r8, r7, pull #\pull
+                mov     r7, r7, push #\push
+                orr     r7, r7, r6, pull #\pull
+                mov     r6, r6, push #\push
+                orr     r6, r6, r5, pull #\pull
+                mov     r5, r5, push #\push
+                orr     r5, r5, r4, pull #\pull
+                mov     r4, r4, push #\push
+                orr     r4, r4, r3, pull #\pull
+                stmdb   r0!, {r4 - r9, ip, lr}
+                bge     12b
+        PLD(    cmn     r2, #96                 )
+        PLD(    bge     13b                     )
+
+                ldmfd   sp!, {r5 - r9}
+
+14:             ands    ip, r2, #28
+                beq     16f
+
+15:             mov     lr, r3, push #\push
+                ldr     r3, [r1, #-4]!
+                subs    ip, ip, #4
+                orr     lr, lr, r3, pull #\pull
+                str     lr, [r0, #-4]!
+                bgt     15b
+        CALGN(  cmp     r2, #0                  )
+        CALGN(  bge     11b                     )
+
+16:             add     r1, r1, #(\pull / 8)
+                b       8b
+
+                .endm
+
+
+                backward_copy_shift     push=8  pull=24
+
+17:             backward_copy_shift     push=16 pull=16
+
+18:             backward_copy_shift     push=24 pull=8
+