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authorNicolas Pitre <nico@cam.org>2005-11-11 16:51:48 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-11-11 16:51:48 -0500
commita9c4814d8db200052c07d8b68e76c134682c4569 (patch)
tree6e25edd9ef8f5dff48b718630410fe2679892a2b /arch/arm/lib/io-writesw-armv3.S
parent7ba11a9c1598ced7d719648a5998a2a81ba06dc9 (diff)
[ARM] 3151/1: make various assembly local labels actually local (io-*.S)
Patch from Nicolas Pitre For assembly labels to actually be local they must start with ".L" and not only "." otherwise they still remain visible in the final link and clutter kallsyms needlessly, and possibly make for unclear symbolic backtrace. This patch simply inserts a"L" where appropriate. The code itself is unchanged. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/lib/io-writesw-armv3.S')
-rw-r--r--arch/arm/lib/io-writesw-armv3.S30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index 950e7e310f1a..52d62b481295 100644
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -11,16 +11,16 @@
11#include <asm/assembler.h> 11#include <asm/assembler.h>
12#include <asm/hardware.h> 12#include <asm/hardware.h>
13 13
14.outsw_bad_alignment: 14.Loutsw_bad_alignment:
15 adr r0, .outsw_bad_align_msg 15 adr r0, .Loutsw_bad_align_msg
16 mov r2, lr 16 mov r2, lr
17 b panic 17 b panic
18.outsw_bad_align_msg: 18.Loutsw_bad_align_msg:
19 .asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n" 19 .asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
20 .align 20 .align
21 21
22.outsw_align: tst r1, #1 22.Loutsw_align: tst r1, #1
23 bne .outsw_bad_alignment 23 bne .Loutsw_bad_alignment
24 24
25 add r1, r1, #2 25 add r1, r1, #2
26 26
@@ -35,14 +35,14 @@ ENTRY(__raw_writesw)
35 teq r2, #0 @ do we have to check for the zero len? 35 teq r2, #0 @ do we have to check for the zero len?
36 moveq pc, lr 36 moveq pc, lr
37 tst r1, #3 37 tst r1, #3
38 bne .outsw_align 38 bne .Loutsw_align
39 39
40.outsw_aligned: stmfd sp!, {r4, r5, r6, lr} 40 stmfd sp!, {r4, r5, r6, lr}
41 41
42 subs r2, r2, #8 42 subs r2, r2, #8
43 bmi .no_outsw_8 43 bmi .Lno_outsw_8
44 44
45.outsw_8_lp: ldmia r1!, {r3, r4, r5, r6} 45.Loutsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
46 46
47 mov ip, r3, lsl #16 47 mov ip, r3, lsl #16
48 orr ip, ip, ip, lsr #16 48 orr ip, ip, ip, lsr #16
@@ -77,13 +77,13 @@ ENTRY(__raw_writesw)
77 str ip, [r0] 77 str ip, [r0]
78 78
79 subs r2, r2, #8 79 subs r2, r2, #8
80 bpl .outsw_8_lp 80 bpl .Loutsw_8_lp
81 81
82 tst r2, #7 82 tst r2, #7
83 LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) 83 LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
84 84
85.no_outsw_8: tst r2, #4 85.Lno_outsw_8: tst r2, #4
86 beq .no_outsw_4 86 beq .Lno_outsw_4
87 87
88 ldmia r1!, {r3, r4} 88 ldmia r1!, {r3, r4}
89 89
@@ -103,8 +103,8 @@ ENTRY(__raw_writesw)
103 orr ip, ip, ip, lsl #16 103 orr ip, ip, ip, lsl #16
104 str ip, [r0] 104 str ip, [r0]
105 105
106.no_outsw_4: tst r2, #2 106.Lno_outsw_4: tst r2, #2
107 beq .no_outsw_2 107 beq .Lno_outsw_2
108 108
109 ldr r3, [r1], #4 109 ldr r3, [r1], #4
110 110
@@ -116,7 +116,7 @@ ENTRY(__raw_writesw)
116 orr ip, ip, ip, lsl #16 116 orr ip, ip, ip, lsl #16
117 str ip, [r0] 117 str ip, [r0]
118 118
119.no_outsw_2: tst r2, #1 119.Lno_outsw_2: tst r2, #1
120 120
121 ldrne r3, [r1] 121 ldrne r3, [r1]
122 122