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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-06-25 06:17:23 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-25 06:17:23 -0400
commit7999d8d7a611bee902446939952859caf1367c25 (patch)
tree98dd4b81951f25b60012f2d91203fab3e0fd9010 /arch/arm/lib/delay.S
parentdfd8317d3340f03bc06eba6b58f0ec0861da4a13 (diff)
[ARM] Remove RETINSTR macro
RETINSTR is a left-over from the days when we had 26-bit and 32-bit CPU support integrated into the same tree. Since this is no longer the case, we can now remove RETINSTR. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/lib/delay.S')
-rw-r--r--arch/arm/lib/delay.S18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S
index 9183b06c0e2f..930a70259220 100644
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay.S
@@ -31,7 +31,7 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
31 mov r2, r2, lsr #10 @ max = 0x00007fff 31 mov r2, r2, lsr #10 @ max = 0x00007fff
32 mul r0, r2, r0 @ max = 2^32-1 32 mul r0, r2, r0 @ max = 2^32-1
33 movs r0, r0, lsr #6 33 movs r0, r0, lsr #6
34 RETINSTR(moveq,pc,lr) 34 moveq pc, lr
35 35
36/* 36/*
37 * loops = r0 * HZ * loops_per_jiffy / 1000000 37 * loops = r0 * HZ * loops_per_jiffy / 1000000
@@ -43,20 +43,20 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
43ENTRY(__delay) 43ENTRY(__delay)
44 subs r0, r0, #1 44 subs r0, r0, #1
45#if 0 45#if 0
46 RETINSTR(movls,pc,lr) 46 movls pc, lr
47 subs r0, r0, #1 47 subs r0, r0, #1
48 RETINSTR(movls,pc,lr) 48 movls pc, lr
49 subs r0, r0, #1 49 subs r0, r0, #1
50 RETINSTR(movls,pc,lr) 50 movls pc, lr
51 subs r0, r0, #1 51 subs r0, r0, #1
52 RETINSTR(movls,pc,lr) 52 movls pc, lr
53 subs r0, r0, #1 53 subs r0, r0, #1
54 RETINSTR(movls,pc,lr) 54 movls pc, lr
55 subs r0, r0, #1 55 subs r0, r0, #1
56 RETINSTR(movls,pc,lr) 56 movls pc, lr
57 subs r0, r0, #1 57 subs r0, r0, #1
58 RETINSTR(movls,pc,lr) 58 movls pc, lr
59 subs r0, r0, #1 59 subs r0, r0, #1
60#endif 60#endif
61 bhi __delay 61 bhi __delay
62 RETINSTR(mov,pc,lr) 62 mov pc, lr