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author | David S. Miller <davem@davemloft.net> | 2011-12-02 13:49:21 -0500 |
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committer | David S. Miller <davem@davemloft.net> | 2011-12-02 13:49:21 -0500 |
commit | b3613118eb30a589d971e4eccbbb2a1314f5dfd4 (patch) | |
tree | 868c1ee59e1b5c19a4f2e43716400d0001a994e5 /arch/arm/lib/bitops.h | |
parent | 7505afe28c16a8d386624930a018d0052c75d687 (diff) | |
parent | 5983fe2b29df5885880d7fa3b91aca306c7564ef (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Diffstat (limited to 'arch/arm/lib/bitops.h')
-rw-r--r-- | arch/arm/lib/bitops.h | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index 10d868a5a481..d6408d1ee543 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h | |||
@@ -1,5 +1,9 @@ | |||
1 | #include <asm/unwind.h> | ||
2 | |||
1 | #if __LINUX_ARM_ARCH__ >= 6 | 3 | #if __LINUX_ARM_ARCH__ >= 6 |
2 | .macro bitop, instr | 4 | .macro bitop, name, instr |
5 | ENTRY( \name ) | ||
6 | UNWIND( .fnstart ) | ||
3 | ands ip, r1, #3 | 7 | ands ip, r1, #3 |
4 | strneb r1, [ip] @ assert word-aligned | 8 | strneb r1, [ip] @ assert word-aligned |
5 | mov r2, #1 | 9 | mov r2, #1 |
@@ -13,9 +17,13 @@ | |||
13 | cmp r0, #0 | 17 | cmp r0, #0 |
14 | bne 1b | 18 | bne 1b |
15 | bx lr | 19 | bx lr |
20 | UNWIND( .fnend ) | ||
21 | ENDPROC(\name ) | ||
16 | .endm | 22 | .endm |
17 | 23 | ||
18 | .macro testop, instr, store | 24 | .macro testop, name, instr, store |
25 | ENTRY( \name ) | ||
26 | UNWIND( .fnstart ) | ||
19 | ands ip, r1, #3 | 27 | ands ip, r1, #3 |
20 | strneb r1, [ip] @ assert word-aligned | 28 | strneb r1, [ip] @ assert word-aligned |
21 | mov r2, #1 | 29 | mov r2, #1 |
@@ -34,9 +42,13 @@ | |||
34 | cmp r0, #0 | 42 | cmp r0, #0 |
35 | movne r0, #1 | 43 | movne r0, #1 |
36 | 2: bx lr | 44 | 2: bx lr |
45 | UNWIND( .fnend ) | ||
46 | ENDPROC(\name ) | ||
37 | .endm | 47 | .endm |
38 | #else | 48 | #else |
39 | .macro bitop, instr | 49 | .macro bitop, name, instr |
50 | ENTRY( \name ) | ||
51 | UNWIND( .fnstart ) | ||
40 | ands ip, r1, #3 | 52 | ands ip, r1, #3 |
41 | strneb r1, [ip] @ assert word-aligned | 53 | strneb r1, [ip] @ assert word-aligned |
42 | and r2, r0, #31 | 54 | and r2, r0, #31 |
@@ -49,6 +61,8 @@ | |||
49 | str r2, [r1, r0, lsl #2] | 61 | str r2, [r1, r0, lsl #2] |
50 | restore_irqs ip | 62 | restore_irqs ip |
51 | mov pc, lr | 63 | mov pc, lr |
64 | UNWIND( .fnend ) | ||
65 | ENDPROC(\name ) | ||
52 | .endm | 66 | .endm |
53 | 67 | ||
54 | /** | 68 | /** |
@@ -59,7 +73,9 @@ | |||
59 | * Note: we can trivially conditionalise the store instruction | 73 | * Note: we can trivially conditionalise the store instruction |
60 | * to avoid dirtying the data cache. | 74 | * to avoid dirtying the data cache. |
61 | */ | 75 | */ |
62 | .macro testop, instr, store | 76 | .macro testop, name, instr, store |
77 | ENTRY( \name ) | ||
78 | UNWIND( .fnstart ) | ||
63 | ands ip, r1, #3 | 79 | ands ip, r1, #3 |
64 | strneb r1, [ip] @ assert word-aligned | 80 | strneb r1, [ip] @ assert word-aligned |
65 | and r3, r0, #31 | 81 | and r3, r0, #31 |
@@ -73,5 +89,7 @@ | |||
73 | moveq r0, #0 | 89 | moveq r0, #0 |
74 | restore_irqs ip | 90 | restore_irqs ip |
75 | mov pc, lr | 91 | mov pc, lr |
92 | UNWIND( .fnend ) | ||
93 | ENDPROC(\name ) | ||
76 | .endm | 94 | .endm |
77 | #endif | 95 | #endif |