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authorLinus Torvalds <torvalds@g5.osdl.org>2006-07-02 18:04:12 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-02 18:04:12 -0400
commita8c4c20dfa8b28a3c99e33c639d9c2ea5657741e (patch)
tree887b64d29b5a46d9ab2ca1267d8a2f05b5845561 /arch/arm/kernel
parent168d04b3b4de7723eb73b3cffc9cb75224e0f393 (diff)
parent2dc7667b9d0674db6572723356fe3857031101a4 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits) [ARM] 3541/2: workaround for PXA27x erratum E7 [ARM] nommu: provide a way for correct control register value selection [ARM] 3705/1: add supersection support to ioremap() [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency [ARM] 3703/1: Add help description for ARCH_EP80219 [ARM] 3678/1: MMC: Make OMAP MMC work [ARM] 3677/1: OMAP: Update H2 defconfig [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1 [ARM] Add section support to ioremap [ARM] Fix sa11x0 SDRAM selection [ARM] Set bit 4 on section mappings correctly depending on CPU [ARM] 3666/1: TRIZEPS4 [1/5] core ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE ARM: OMAP: Update dmtimers ARM: OMAP: Make clock variables static ARM: OMAP: Fix GPMC compilation when DEBUG is defined ARM: OMAP: Mux updates for external DMA and GPIO ...
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/Makefile2
-rw-r--r--arch/arm/kernel/asm-offsets.c3
-rw-r--r--arch/arm/kernel/entry-armv.S4
-rw-r--r--arch/arm/kernel/head.S5
-rw-r--r--arch/arm/kernel/iwmmxt-notifier.c64
-rw-r--r--arch/arm/kernel/iwmmxt.S27
-rw-r--r--arch/arm/kernel/process.c6
-rw-r--r--arch/arm/kernel/setup.c4
8 files changed, 84 insertions, 31 deletions
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 7cffbaef064b..f0c0cdb1c183 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
25obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o 25obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
26AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 26AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
27 27
28obj-$(CONFIG_IWMMXT) += iwmmxt.o 28obj-$(CONFIG_IWMMXT) += iwmmxt.o iwmmxt-notifier.o
29AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt 29AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
30 30
31ifneq ($(CONFIG_ARCH_EBSA110),y) 31ifneq ($(CONFIG_ARCH_EBSA110),y)
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 447ede5143a8..cc2d58d028e1 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -105,6 +105,7 @@ int main(void)
105 BLANK(); 105 BLANK();
106 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list)); 106 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
107 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); 107 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
108 DEFINE(PROCINFO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mmu_flags)); 108 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
109 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
109 return 0; 110 return 0;
110} 111}
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 26f197afd204..7ea5f01dfc7b 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -589,9 +589,7 @@ ENTRY(__switch_to)
589#ifdef CONFIG_MMU 589#ifdef CONFIG_MMU
590 mcr p15, 0, r6, c3, c0, 0 @ Set domain register 590 mcr p15, 0, r6, c3, c0, 0 @ Set domain register
591#endif 591#endif
592#if defined(CONFIG_IWMMXT) 592#if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
593 bl iwmmxt_task_switch
594#elif defined(CONFIG_CPU_XSCALE)
595 add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra 593 add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra
596 ldmib r4, {r4, r5} 594 ldmib r4, {r4, r5}
597 mar acc0, r4, r5 595 mar acc0, r4, r5
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 518b80cd87de..2242f5f7cb7d 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -220,7 +220,7 @@ __create_page_tables:
220 teq r0, r6 220 teq r0, r6
221 bne 1b 221 bne 1b
222 222
223 ldr r7, [r10, #PROCINFO_MMUFLAGS] @ mmuflags 223 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
224 224
225 /* 225 /*
226 * Create identity mapping for first MB of kernel to 226 * Create identity mapping for first MB of kernel to
@@ -271,8 +271,7 @@ __create_page_tables:
271#endif 271#endif
272 272
273#ifdef CONFIG_DEBUG_LL 273#ifdef CONFIG_DEBUG_LL
274 bic r7, r7, #0x0c @ turn off cacheable 274 ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
275 @ and bufferable bits
276 /* 275 /*
277 * Map in IO space for serial debugging. 276 * Map in IO space for serial debugging.
278 * This allows debug messages to be output 277 * This allows debug messages to be output
diff --git a/arch/arm/kernel/iwmmxt-notifier.c b/arch/arm/kernel/iwmmxt-notifier.c
new file mode 100644
index 000000000000..44a86c33796e
--- /dev/null
+++ b/arch/arm/kernel/iwmmxt-notifier.c
@@ -0,0 +1,64 @@
1/*
2 * linux/arch/arm/kernel/iwmmxt-notifier.c
3 *
4 * XScale iWMMXt (Concan) context switching and handling
5 *
6 * Initial code:
7 * Copyright (c) 2003, Intel Corporation
8 *
9 * Full lazy switching support, optimizations and more, by Nicolas Pitre
10 * Copyright (c) 2003-2004, MontaVista Software, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#include <linux/module.h>
18#include <linux/config.h>
19#include <linux/types.h>
20#include <linux/kernel.h>
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/init.h>
24#include <asm/thread_notify.h>
25#include <asm/io.h>
26
27static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
28{
29 struct thread_info *thread = t;
30
31 switch (cmd) {
32 case THREAD_NOTIFY_FLUSH:
33 /*
34 * flush_thread() zeroes thread->fpstate, so no need
35 * to do anything here.
36 *
37 * FALLTHROUGH: Ensure we don't try to overwrite our newly
38 * initialised state information on the first fault.
39 */
40
41 case THREAD_NOTIFY_RELEASE:
42 iwmmxt_task_release(thread);
43 break;
44
45 case THREAD_NOTIFY_SWITCH:
46 iwmmxt_task_switch(thread);
47 break;
48 }
49
50 return NOTIFY_DONE;
51}
52
53static struct notifier_block iwmmxt_notifier_block = {
54 .notifier_call = iwmmxt_do,
55};
56
57static int __init iwmmxt_init(void)
58{
59 thread_register_notifier(&iwmmxt_notifier_block);
60
61 return 0;
62}
63
64late_initcall(iwmmxt_init);
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index a3bae95e536c..b63b528f22a6 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -271,30 +271,27 @@ ENTRY(iwmmxt_task_restore)
271/* 271/*
272 * Concan handling on task switch 272 * Concan handling on task switch
273 * 273 *
274 * r0 = previous task_struct pointer (must be preserved) 274 * r0 = next thread_info pointer
275 * r1 = previous thread_info pointer
276 * r2 = next thread_info pointer (must be preserved)
277 * 275 *
278 * Called only from __switch_to with task preemption disabled. 276 * Called only from the iwmmxt notifier with task preemption disabled.
279 * No need to care about preserving r4 and above.
280 */ 277 */
281ENTRY(iwmmxt_task_switch) 278ENTRY(iwmmxt_task_switch)
282 279
283 mrc p15, 0, r4, c15, c1, 0 280 mrc p15, 0, r1, c15, c1, 0
284 tst r4, #0x3 @ CP0 and CP1 accessible? 281 tst r1, #0x3 @ CP0 and CP1 accessible?
285 bne 1f @ yes: block them for next task 282 bne 1f @ yes: block them for next task
286 283
287 ldr r5, =concan_owner 284 ldr r2, =concan_owner
288 add r6, r2, #TI_IWMMXT_STATE @ get next task Concan save area 285 add r3, r0, #TI_IWMMXT_STATE @ get next task Concan save area
289 ldr r5, [r5] @ get current Concan owner 286 ldr r2, [r2] @ get current Concan owner
290 teq r5, r6 @ next task owns it? 287 teq r2, r3 @ next task owns it?
291 movne pc, lr @ no: leave Concan disabled 288 movne pc, lr @ no: leave Concan disabled
292 289
2931: eor r4, r4, #3 @ flip Concan access 2901: eor r1, r1, #3 @ flip Concan access
294 mcr p15, 0, r4, c15, c1, 0 291 mcr p15, 0, r1, c15, c1, 0
295 292
296 mrc p15, 0, r4, c2, c0, 0 293 mrc p15, 0, r1, c2, c0, 0
297 sub pc, lr, r4, lsr #32 @ cpwait and return 294 sub pc, lr, r1, lsr #32 @ cpwait and return
298 295
299/* 296/*
300 * Remove Concan ownership of given task 297 * Remove Concan ownership of given task
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index c3258b763c5d..3079535afccd 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -352,9 +352,6 @@ void flush_thread(void)
352 memset(&thread->fpstate, 0, sizeof(union fp_state)); 352 memset(&thread->fpstate, 0, sizeof(union fp_state));
353 353
354 thread_notify(THREAD_NOTIFY_FLUSH, thread); 354 thread_notify(THREAD_NOTIFY_FLUSH, thread);
355#if defined(CONFIG_IWMMXT)
356 iwmmxt_task_release(thread);
357#endif
358} 355}
359 356
360void release_thread(struct task_struct *dead_task) 357void release_thread(struct task_struct *dead_task)
@@ -362,9 +359,6 @@ void release_thread(struct task_struct *dead_task)
362 struct thread_info *thread = task_thread_info(dead_task); 359 struct thread_info *thread = task_thread_info(dead_task);
363 360
364 thread_notify(THREAD_NOTIFY_RELEASE, thread); 361 thread_notify(THREAD_NOTIFY_RELEASE, thread);
365#if defined(CONFIG_IWMMXT)
366 iwmmxt_task_release(thread);
367#endif
368} 362}
369 363
370asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); 364asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7447a1987322..7d6a516c0b9f 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -344,9 +344,9 @@ static void __init setup_processor(void)
344 cpu_cache = *list->cache; 344 cpu_cache = *list->cache;
345#endif 345#endif
346 346
347 printk("CPU: %s [%08x] revision %d (ARMv%s)\n", 347 printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n",
348 cpu_name, processor_id, (int)processor_id & 15, 348 cpu_name, processor_id, (int)processor_id & 15,
349 proc_arch[cpu_architecture()]); 349 proc_arch[cpu_architecture()], cr_alignment);
350 350
351 sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS); 351 sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS);
352 sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); 352 sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);