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authorCatalin Marinas <catalin.marinas@arm.com>2011-11-22 12:30:31 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2011-12-08 05:30:40 -0500
commitf7b8156d150f7383b42622a9219b230b36435b4a (patch)
treec06e0ed558f7a9e106920a9f3acbb6bed15017bf /arch/arm/kernel
parentc9f27f1026f55b543df260ad8ab84a7bdab7792f (diff)
ARM: LPAE: Add fault handling support
The DFSR and IFSR register format is different when LPAE is enabled. In addition, DFSR and IFSR have similar definitions for the fault type. This modifies the fault code to correctly handle the new format. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/hw_breakpoint.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 814a52a9dc39..d6a95ef9131d 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1016,10 +1016,10 @@ static int __init arch_hw_breakpoint_init(void)
1016 } 1016 }
1017 1017
1018 /* Register debug fault handler. */ 1018 /* Register debug fault handler. */
1019 hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, 1019 hook_fault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
1020 "watchpoint debug exception"); 1020 TRAP_HWBKPT, "watchpoint debug exception");
1021 hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, 1021 hook_ifault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
1022 "breakpoint debug exception"); 1022 TRAP_HWBKPT, "breakpoint debug exception");
1023 1023
1024 /* Register hotplug notifier. */ 1024 /* Register hotplug notifier. */
1025 register_cpu_notifier(&dbg_reset_nb); 1025 register_cpu_notifier(&dbg_reset_nb);