aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/kernel
diff options
context:
space:
mode:
authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-06-25 07:01:48 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-25 07:01:48 -0400
commit801194e3bcf7cde163b23c6279c559e69cb4ca57 (patch)
tree194576773e93d8491df7c341e284986c3338e2d7 /arch/arm/kernel
parent405040a78b33e39edf4180fc993b9608f07d3c41 (diff)
[ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ
DEFAULT_FIQ was entirely unused. MODE_* are just redefinitions of *_MODE. Use *_MODE instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/head-nommu.S2
-rw-r--r--arch/arm/kernel/head.S4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index adf62e5eaad7..2af7e44218af 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -39,7 +39,7 @@
39 __INIT 39 __INIT
40 .type stext, %function 40 .type stext, %function
41ENTRY(stext) 41ENTRY(stext)
42 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode 42 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
43 @ and irqs disabled 43 @ and irqs disabled
44 mrc p15, 0, r9, c0, c0 @ get processor id 44 mrc p15, 0, r9, c0, c0 @ get processor id
45 bl __lookup_processor_type @ r5=procinfo r9=cpuid 45 bl __lookup_processor_type @ r5=procinfo r9=cpuid
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 04f7344e356a..330b9476c398 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -71,7 +71,7 @@
71 __INIT 71 __INIT
72 .type stext, %function 72 .type stext, %function
73ENTRY(stext) 73ENTRY(stext)
74 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode 74 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
75 @ and irqs disabled 75 @ and irqs disabled
76 mrc p15, 0, r9, c0, c0 @ get processor id 76 mrc p15, 0, r9, c0, c0 @ get processor id
77 bl __lookup_processor_type @ r5=procinfo r9=cpuid 77 bl __lookup_processor_type @ r5=procinfo r9=cpuid
@@ -104,7 +104,7 @@ ENTRY(secondary_startup)
104 * the processor type - there is no need to check the machine type 104 * the processor type - there is no need to check the machine type
105 * as it has already been validated by the primary processor. 105 * as it has already been validated by the primary processor.
106 */ 106 */
107 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC 107 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
108 mrc p15, 0, r9, c0, c0 @ get processor id 108 mrc p15, 0, r9, c0, c0 @ get processor id
109 bl __lookup_processor_type 109 bl __lookup_processor_type
110 movs r10, r5 @ invalid processor? 110 movs r10, r5 @ invalid processor?