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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-08-29 19:34:07 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-08-29 19:34:07 -0400 |
commit | 90e93648c41bd29a72f6ec55ce27a23c209eab8c (patch) | |
tree | 705afc522c361f681567187018d80cf028fcb334 /arch/arm/kernel | |
parent | 3ae627b5a6c8f6bf992eee6a3399a1854641a476 (diff) | |
parent | 25904157168ddc8841748a729914f00e53d7e049 (diff) |
Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: pm: avoid writing the auxillary control register for ARMv7
ARM: pm: some ARMv7 requires a dsb in resume to ensure correctness
ARM: pm: arm920/926: fix number of registers saved
ARM: pm: CPU specific code should not overwrite r1 (v:p offset)
ARM: 7066/1: proc-v7: disable SCTLR.TE when disabling MMU
ARM: 7065/1: kexec: ensure new kernel is entered in ARM state
ARM: 7003/1: vexpress: Add clock definition for the SP805.
ARM: 7051/1: cpuimx* boards: fix mach-types errors
ARM: 7019/1: Footbridge: select CLKEVT_I8253 for ARCH_NETWINDER
ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled
ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.
ARM: 6967/1: ep93xx: ts72xx: fix board model detection
ARM: 6965/1: ep93xx: add model detection for ts-7300 and ts-7400 boards
ARM: cache: detect VIPT aliasing I-cache on ARMv6
ARM: twd: register clockevents device before enabling PPI
ARM: realview: ensure visibility of writes during reset
ARM: perf: make name of arm_pmu_type consistent
ARM: perf: fix prototype of release_pmu
ARM: fix perf build with uclibc toolchains
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r-- | arch/arm/kernel/pmu.c | 26 | ||||
-rw-r--r-- | arch/arm/kernel/relocate_kernel.S | 3 | ||||
-rw-r--r-- | arch/arm/kernel/setup.c | 15 | ||||
-rw-r--r-- | arch/arm/kernel/smp_twd.c | 4 |
4 files changed, 25 insertions, 23 deletions
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c index 2b70709376c3..c53474fe84df 100644 --- a/arch/arm/kernel/pmu.c +++ b/arch/arm/kernel/pmu.c | |||
@@ -31,7 +31,7 @@ static int __devinit pmu_register(struct platform_device *pdev, | |||
31 | { | 31 | { |
32 | if (type < 0 || type >= ARM_NUM_PMU_DEVICES) { | 32 | if (type < 0 || type >= ARM_NUM_PMU_DEVICES) { |
33 | pr_warning("received registration request for unknown " | 33 | pr_warning("received registration request for unknown " |
34 | "device %d\n", type); | 34 | "PMU device type %d\n", type); |
35 | return -EINVAL; | 35 | return -EINVAL; |
36 | } | 36 | } |
37 | 37 | ||
@@ -112,17 +112,17 @@ static int __init register_pmu_driver(void) | |||
112 | device_initcall(register_pmu_driver); | 112 | device_initcall(register_pmu_driver); |
113 | 113 | ||
114 | struct platform_device * | 114 | struct platform_device * |
115 | reserve_pmu(enum arm_pmu_type device) | 115 | reserve_pmu(enum arm_pmu_type type) |
116 | { | 116 | { |
117 | struct platform_device *pdev; | 117 | struct platform_device *pdev; |
118 | 118 | ||
119 | if (test_and_set_bit_lock(device, &pmu_lock)) { | 119 | if (test_and_set_bit_lock(type, &pmu_lock)) { |
120 | pdev = ERR_PTR(-EBUSY); | 120 | pdev = ERR_PTR(-EBUSY); |
121 | } else if (pmu_devices[device] == NULL) { | 121 | } else if (pmu_devices[type] == NULL) { |
122 | clear_bit_unlock(device, &pmu_lock); | 122 | clear_bit_unlock(type, &pmu_lock); |
123 | pdev = ERR_PTR(-ENODEV); | 123 | pdev = ERR_PTR(-ENODEV); |
124 | } else { | 124 | } else { |
125 | pdev = pmu_devices[device]; | 125 | pdev = pmu_devices[type]; |
126 | } | 126 | } |
127 | 127 | ||
128 | return pdev; | 128 | return pdev; |
@@ -130,11 +130,11 @@ reserve_pmu(enum arm_pmu_type device) | |||
130 | EXPORT_SYMBOL_GPL(reserve_pmu); | 130 | EXPORT_SYMBOL_GPL(reserve_pmu); |
131 | 131 | ||
132 | int | 132 | int |
133 | release_pmu(enum arm_pmu_type device) | 133 | release_pmu(enum arm_pmu_type type) |
134 | { | 134 | { |
135 | if (WARN_ON(!pmu_devices[device])) | 135 | if (WARN_ON(!pmu_devices[type])) |
136 | return -EINVAL; | 136 | return -EINVAL; |
137 | clear_bit_unlock(device, &pmu_lock); | 137 | clear_bit_unlock(type, &pmu_lock); |
138 | return 0; | 138 | return 0; |
139 | } | 139 | } |
140 | EXPORT_SYMBOL_GPL(release_pmu); | 140 | EXPORT_SYMBOL_GPL(release_pmu); |
@@ -182,17 +182,17 @@ init_cpu_pmu(void) | |||
182 | } | 182 | } |
183 | 183 | ||
184 | int | 184 | int |
185 | init_pmu(enum arm_pmu_type device) | 185 | init_pmu(enum arm_pmu_type type) |
186 | { | 186 | { |
187 | int err = 0; | 187 | int err = 0; |
188 | 188 | ||
189 | switch (device) { | 189 | switch (type) { |
190 | case ARM_PMU_DEVICE_CPU: | 190 | case ARM_PMU_DEVICE_CPU: |
191 | err = init_cpu_pmu(); | 191 | err = init_cpu_pmu(); |
192 | break; | 192 | break; |
193 | default: | 193 | default: |
194 | pr_warning("attempt to initialise unknown device %d\n", | 194 | pr_warning("attempt to initialise PMU of unknown " |
195 | device); | 195 | "type %d\n", type); |
196 | err = -EINVAL; | 196 | err = -EINVAL; |
197 | } | 197 | } |
198 | 198 | ||
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S index 9cf4cbf8f95b..d0cdedf4864d 100644 --- a/arch/arm/kernel/relocate_kernel.S +++ b/arch/arm/kernel/relocate_kernel.S | |||
@@ -57,7 +57,8 @@ relocate_new_kernel: | |||
57 | mov r0,#0 | 57 | mov r0,#0 |
58 | ldr r1,kexec_mach_type | 58 | ldr r1,kexec_mach_type |
59 | ldr r2,kexec_boot_atags | 59 | ldr r2,kexec_boot_atags |
60 | mov pc,lr | 60 | ARM( mov pc, lr ) |
61 | THUMB( bx lr ) | ||
61 | 62 | ||
62 | .align | 63 | .align |
63 | 64 | ||
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 70bca649e925..e514c76043b4 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -280,18 +280,19 @@ static void __init cacheid_init(void) | |||
280 | if (arch >= CPU_ARCH_ARMv6) { | 280 | if (arch >= CPU_ARCH_ARMv6) { |
281 | if ((cachetype & (7 << 29)) == 4 << 29) { | 281 | if ((cachetype & (7 << 29)) == 4 << 29) { |
282 | /* ARMv7 register format */ | 282 | /* ARMv7 register format */ |
283 | arch = CPU_ARCH_ARMv7; | ||
283 | cacheid = CACHEID_VIPT_NONALIASING; | 284 | cacheid = CACHEID_VIPT_NONALIASING; |
284 | if ((cachetype & (3 << 14)) == 1 << 14) | 285 | if ((cachetype & (3 << 14)) == 1 << 14) |
285 | cacheid |= CACHEID_ASID_TAGGED; | 286 | cacheid |= CACHEID_ASID_TAGGED; |
286 | else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7)) | ||
287 | cacheid |= CACHEID_VIPT_I_ALIASING; | ||
288 | } else if (cachetype & (1 << 23)) { | ||
289 | cacheid = CACHEID_VIPT_ALIASING; | ||
290 | } else { | 287 | } else { |
291 | cacheid = CACHEID_VIPT_NONALIASING; | 288 | arch = CPU_ARCH_ARMv6; |
292 | if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6)) | 289 | if (cachetype & (1 << 23)) |
293 | cacheid |= CACHEID_VIPT_I_ALIASING; | 290 | cacheid = CACHEID_VIPT_ALIASING; |
291 | else | ||
292 | cacheid = CACHEID_VIPT_NONALIASING; | ||
294 | } | 293 | } |
294 | if (cpu_has_aliasing_icache(arch)) | ||
295 | cacheid |= CACHEID_VIPT_I_ALIASING; | ||
295 | } else { | 296 | } else { |
296 | cacheid = CACHEID_VIVT; | 297 | cacheid = CACHEID_VIVT; |
297 | } | 298 | } |
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 2c277d40cee6..01c186222f3b 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c | |||
@@ -137,8 +137,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) | |||
137 | clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); | 137 | clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); |
138 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); | 138 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); |
139 | 139 | ||
140 | clockevents_register_device(clk); | ||
141 | |||
140 | /* Make sure our local interrupt controller has this enabled */ | 142 | /* Make sure our local interrupt controller has this enabled */ |
141 | gic_enable_ppi(clk->irq); | 143 | gic_enable_ppi(clk->irq); |
142 | |||
143 | clockevents_register_device(clk); | ||
144 | } | 144 | } |