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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-06-13 08:45:34 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-06-24 03:47:23 -0400
commit2fefbcd58590cf33189c6178098e12b31b994b5f (patch)
tree3e93f33e0f9909cac3c595c528dd485479526ca0 /arch/arm/kernel/sleep.S
parent6b5f6ab0e1c33beaed828271f13c03ed02ee3c15 (diff)
ARM: pm: move return address (for cpu_resume) to top of stack
Move the return address for cpu_resume to the top of stack so that cpu_resume looks more like a normal function. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/sleep.S')
-rw-r--r--arch/arm/kernel/sleep.S16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 97a6577aa61e..f8e92513c1bd 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -15,6 +15,7 @@
15 * r0-r3,r9,r10,lr corrupted 15 * r0-r3,r9,r10,lr corrupted
16 */ 16 */
17ENTRY(cpu_suspend) 17ENTRY(cpu_suspend)
18 stmfd sp!, {r3}
18 mov r9, lr 19 mov r9, lr
19#ifdef MULTI_CPU 20#ifdef MULTI_CPU
20 ldr r10, =processor 21 ldr r10, =processor
@@ -24,7 +25,7 @@ ENTRY(cpu_suspend)
24 sub sp, sp, r0 @ allocate CPU state on stack 25 sub sp, sp, r0 @ allocate CPU state on stack
25 mov r0, sp @ save pointer 26 mov r0, sp @ save pointer
26 add ip, ip, r1 @ convert resume fn to phys 27 add ip, ip, r1 @ convert resume fn to phys
27 stmfd sp!, {r1, r2, r3, ip} @ save v:p, virt SP, retfn, phys resume fn 28 stmfd sp!, {r1, r2, ip} @ save v:p, virt SP, phys resume fn
28 ldr r3, =sleep_save_sp 29 ldr r3, =sleep_save_sp
29 add r2, sp, r1 @ convert SP to phys 30 add r2, sp, r1 @ convert SP to phys
30#ifdef CONFIG_SMP 31#ifdef CONFIG_SMP
@@ -44,7 +45,7 @@ ENTRY(cpu_suspend)
44 sub sp, sp, r0 @ allocate CPU state on stack 45 sub sp, sp, r0 @ allocate CPU state on stack
45 mov r0, sp @ save pointer 46 mov r0, sp @ save pointer
46 add ip, ip, r1 @ convert resume fn to phys 47 add ip, ip, r1 @ convert resume fn to phys
47 stmfd sp!, {r1, r2, r3, ip} @ save v:p, virt SP, retfn, phys resume fn 48 stmfd sp!, {r1, r2, ip} @ save v:p, virt SP, phys resume fn
48 ldr r3, =sleep_save_sp 49 ldr r3, =sleep_save_sp
49 add r2, sp, r1 @ convert SP to phys 50 add r2, sp, r1 @ convert SP to phys
50#ifdef CONFIG_SMP 51#ifdef CONFIG_SMP
@@ -99,7 +100,7 @@ ENDPROC(cpu_resume_turn_mmu_on)
99cpu_resume_after_mmu: 100cpu_resume_after_mmu:
100 str r5, [r2, r4, lsl #2] @ restore old mapping 101 str r5, [r2, r4, lsl #2] @ restore old mapping
101 mcr p15, 0, r0, c1, c0, 0 @ turn on D-cache 102 mcr p15, 0, r0, c1, c0, 0 @ turn on D-cache
102 mov pc, lr 103 ldmfd sp!, {pc}
103ENDPROC(cpu_resume_after_mmu) 104ENDPROC(cpu_resume_after_mmu)
104 105
105/* 106/*
@@ -122,12 +123,11 @@ ENTRY(cpu_resume)
122 ldr r0, sleep_save_sp @ stack phys addr 123 ldr r0, sleep_save_sp @ stack phys addr
123#endif 124#endif
124 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off 125 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
125 @ load v:p, stack, return fn, resume fn 126 @ load v:p, stack, resume fn
126 ARM( ldmia r0!, {r1, sp, lr, pc} ) 127 ARM( ldmia r0!, {r1, sp, pc} )
127THUMB( ldmia r0!, {r1, r2, r3, r4} ) 128THUMB( ldmia r0!, {r1, r2, r3} )
128THUMB( mov sp, r2 ) 129THUMB( mov sp, r2 )
129THUMB( mov lr, r3 ) 130THUMB( bx r3 )
130THUMB( bx r4 )
131ENDPROC(cpu_resume) 131ENDPROC(cpu_resume)
132 132
133sleep_save_sp: 133sleep_save_sp: