diff options
author | Will Deacon <will.deacon@arm.com> | 2011-11-15 06:11:19 -0500 |
---|---|---|
committer | Will Deacon <will.deacon@arm.com> | 2011-12-06 09:04:14 -0500 |
commit | e6eadc67873d5f363c864cd7723104e7d47dcb44 (patch) | |
tree | b6256b48201535207bfd4750efc5ca4a7d431abd /arch/arm/kernel/sleep.S | |
parent | 8903826d0cd99aed9267e792d38284cf3092042b (diff) |
ARM: suspend: use idmap_pgd instead of suspend_pgd
The ARM CPU suspend code requires cpu_resume_mmu to be identity mapped
in order to re-enable the MMU when coming out of suspend. Currently,
this is accomplished by maintaining a suspend_pgd with the relevant
mapping put in place at init time.
This patch replaces the use of suspend_pgd with the new idmap_pgd.
cpu_resume_mmu is placed in the .idmap.text section so that it is
included in the identity map.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Dave Martin <dave.martin@linaro.org>
Tested-by: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/sleep.S')
-rw-r--r-- | arch/arm/kernel/sleep.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index 020e99c845e7..9e64231c8cfe 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S | |||
@@ -54,6 +54,7 @@ ENDPROC(cpu_suspend_abort) | |||
54 | * r0 = control register value | 54 | * r0 = control register value |
55 | */ | 55 | */ |
56 | .align 5 | 56 | .align 5 |
57 | .pushsection .idmap.text,"ax" | ||
57 | ENTRY(cpu_resume_mmu) | 58 | ENTRY(cpu_resume_mmu) |
58 | ldr r3, =cpu_resume_after_mmu | 59 | ldr r3, =cpu_resume_after_mmu |
59 | mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc | 60 | mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc |
@@ -62,6 +63,7 @@ ENTRY(cpu_resume_mmu) | |||
62 | mov r0, r0 | 63 | mov r0, r0 |
63 | mov pc, r3 @ jump to virtual address | 64 | mov pc, r3 @ jump to virtual address |
64 | ENDPROC(cpu_resume_mmu) | 65 | ENDPROC(cpu_resume_mmu) |
66 | .popsection | ||
65 | cpu_resume_after_mmu: | 67 | cpu_resume_after_mmu: |
66 | bl cpu_init @ restore the und/abt/irq banked regs | 68 | bl cpu_init @ restore the und/abt/irq banked regs |
67 | mov r0, #0 @ return zero on success | 69 | mov r0, #0 @ return zero on success |