ARM: Thumb-2: Support Thumb-2 in undefined instruction handler

This patch allows undef_hook's to be specified for 32-bit Thumb
instructions and also to be used for thumb kernel-side code.

32-bit Thumb instructions are specified in the form:
	((first_half << 16 ) | second_half)
which matches the layout used by the ARM ARM.

ptrace was handling 32-bit Thumb instructions by hooking the first
halfword and manually checking the second half. This method would be
broken by this patch so it is migrated to make use of the new Thumb-2
support.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>

1 files changed, 3 insertions, 25 deletions

diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 97260060bf26..897ade059f58 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -228,34 +228,12 @@ static struct undef_hook thumb_break_hook = {
         .fn             = break_trap,
 };
 
-static int thumb2_break_trap(struct pt_regs *regs, unsigned int instr)
-{
-        unsigned int instr2;
-        void __user *pc;
-
-        /* Check the second half of the instruction.  */
-        pc = (void __user *)(instruction_pointer(regs) + 2);
-
-        if (processor_mode(regs) == SVC_MODE) {
-                instr2 = *(u16 *) pc;
-        } else {
-                get_user(instr2, (u16 __user *)pc);
-        }
-
-        if (instr2 == 0xa000) {
-                ptrace_break(current, regs);
-                return 0;
-        } else {
-                return 1;
-        }
-}
-
 static struct undef_hook thumb2_break_hook = {
-        .instr_mask     = 0xffff,
-        .instr_val      = 0xf7f0,
+        .instr_mask     = 0xffffffff,
+        .instr_val      = 0xf7f0a000,
         .cpsr_mask      = PSR_T_BIT,
         .cpsr_val       = PSR_T_BIT,
-        .fn             = thumb2_break_trap,
+        .fn             = break_trap,
 };
 
 static int __init ptrace_break_init(void)