diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-01 12:15:15 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-01 12:15:15 -0500 |
commit | ac0f6f927db539e03e1f3f61bcd4ed57d5cde7a9 (patch) | |
tree | 816e5ac643b15c2050c64a7075f0f7e13d86ea09 /arch/arm/kernel/pmu.c | |
parent | b1bf9368407ae7e89d8a005bb40beb70a41df539 (diff) | |
parent | 9f33be2c3a80bdc2cc08342dd77fac87652e0548 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits)
ARM: Eliminate decompressor -Dstatic= PIC hack
ARM: 5958/1: ARM: U300: fix inverted clk round rate
ARM: 5956/1: misplaced parentheses
ARM: 5955/1: ep93xx: move timer defines into core.c and document
ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c
ARM: 5953/1: ep93xx: fix broken build of clock.c
ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
ARM: 5949/1: NUC900 add gpio virtual memory map
ARM: 5948/1: Enable timer0 to time4 clock support for nuc910
ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk
ARM: make_coherent(): fix problems with highpte, part 2
MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
ARM: 5945/1: ep93xx: include correct irq.h in core.c
ARM: 5933/1: amba-pl011: support hardware flow control
ARM: 5930/1: Add PKMAP area description to memory.txt.
ARM: 5929/1: Add checks to detect overlap of memory regions.
ARM: 5928/1: Change type of VMALLOC_END to unsigned long.
ARM: 5927/1: Make delimiters of DMA area globally visibly.
ARM: 5926/1: Add "Virtual kernel memory..." printout.
ARM: 5920/1: OMAP4: Enable L2 Cache
...
Fix up trivial conflict in arch/arm/mach-mx25/clock.c
Diffstat (limited to 'arch/arm/kernel/pmu.c')
-rw-r--r-- | arch/arm/kernel/pmu.c | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c new file mode 100644 index 000000000000..a124312e343f --- /dev/null +++ b/arch/arm/kernel/pmu.c | |||
@@ -0,0 +1,103 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/kernel/pmu.c | ||
3 | * | ||
4 | * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #include <linux/cpumask.h> | ||
13 | #include <linux/err.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/module.h> | ||
17 | |||
18 | #include <asm/pmu.h> | ||
19 | |||
20 | /* | ||
21 | * Define the IRQs for the system. We could use something like a platform | ||
22 | * device but that seems fairly heavyweight for this. Also, the performance | ||
23 | * counters can't be removed or hotplugged. | ||
24 | * | ||
25 | * Ordering is important: init_pmu() will use the ordering to set the affinity | ||
26 | * to the corresponding core. e.g. the first interrupt will go to cpu 0, the | ||
27 | * second goes to cpu 1 etc. | ||
28 | */ | ||
29 | static const int irqs[] = { | ||
30 | #if defined(CONFIG_ARCH_OMAP2) | ||
31 | 3, | ||
32 | #elif defined(CONFIG_ARCH_BCMRING) | ||
33 | IRQ_PMUIRQ, | ||
34 | #elif defined(CONFIG_MACH_REALVIEW_EB) | ||
35 | IRQ_EB11MP_PMU_CPU0, | ||
36 | IRQ_EB11MP_PMU_CPU1, | ||
37 | IRQ_EB11MP_PMU_CPU2, | ||
38 | IRQ_EB11MP_PMU_CPU3, | ||
39 | #elif defined(CONFIG_ARCH_OMAP3) | ||
40 | INT_34XX_BENCH_MPU_EMUL, | ||
41 | #elif defined(CONFIG_ARCH_IOP32X) | ||
42 | IRQ_IOP32X_CORE_PMU, | ||
43 | #elif defined(CONFIG_ARCH_IOP33X) | ||
44 | IRQ_IOP33X_CORE_PMU, | ||
45 | #elif defined(CONFIG_ARCH_PXA) | ||
46 | IRQ_PMU, | ||
47 | #endif | ||
48 | }; | ||
49 | |||
50 | static const struct pmu_irqs pmu_irqs = { | ||
51 | .irqs = irqs, | ||
52 | .num_irqs = ARRAY_SIZE(irqs), | ||
53 | }; | ||
54 | |||
55 | static volatile long pmu_lock; | ||
56 | |||
57 | const struct pmu_irqs * | ||
58 | reserve_pmu(void) | ||
59 | { | ||
60 | return test_and_set_bit_lock(0, &pmu_lock) ? ERR_PTR(-EBUSY) : | ||
61 | &pmu_irqs; | ||
62 | } | ||
63 | EXPORT_SYMBOL_GPL(reserve_pmu); | ||
64 | |||
65 | int | ||
66 | release_pmu(const struct pmu_irqs *irqs) | ||
67 | { | ||
68 | if (WARN_ON(irqs != &pmu_irqs)) | ||
69 | return -EINVAL; | ||
70 | clear_bit_unlock(0, &pmu_lock); | ||
71 | return 0; | ||
72 | } | ||
73 | EXPORT_SYMBOL_GPL(release_pmu); | ||
74 | |||
75 | static int | ||
76 | set_irq_affinity(int irq, | ||
77 | unsigned int cpu) | ||
78 | { | ||
79 | #ifdef CONFIG_SMP | ||
80 | int err = irq_set_affinity(irq, cpumask_of(cpu)); | ||
81 | if (err) | ||
82 | pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n", | ||
83 | irq, cpu); | ||
84 | return err; | ||
85 | #else | ||
86 | return 0; | ||
87 | #endif | ||
88 | } | ||
89 | |||
90 | int | ||
91 | init_pmu(void) | ||
92 | { | ||
93 | int i, err = 0; | ||
94 | |||
95 | for (i = 0; i < pmu_irqs.num_irqs; ++i) { | ||
96 | err = set_irq_affinity(pmu_irqs.irqs[i], i); | ||
97 | if (err) | ||
98 | break; | ||
99 | } | ||
100 | |||
101 | return err; | ||
102 | } | ||
103 | EXPORT_SYMBOL_GPL(init_pmu); | ||